m5m51016btp Renesas Electronics Corporation., m5m51016btp Datasheet - Page 83

• Manufacturer Part Number: m5m51016btp
• Description: Renesas 16-bit Single-chip Microcomputer M16c Family / M16c/20 Series
• Manufacturer: Renesas Electronics Corporation.

M30245 Group
Rev.2.00 Oct 16, 2006
REJ09B0340-0200
Figure 2.4.13. Operation timing of transmission in UART mode (used for SIM interface)
T r a n s f e r c l o c k
Transmit
enable bit (TE)
Transmit buffer
empty flag (Tl)
T
R
S i g n a l l i n e l e v e l
( N o t e 2 )
T r a n s m i t b u f f e r
e m p t y f l a g
( T E X P T )
T r a n s m i t
i n t e r r u p t r e q u e s t
b i t ( I R )
X
Example of wiring
Example of operation (when direct format)
X
D
D
i
i
( N o t e 2 )
( N o t e 2 )
N o t e 1 : T h e t r a n s m i t i s s t a r t e d w i t h o v e r f l o w t i m i n g o f B R G a f t e r h a v i n g w r i t t e n i n a v a l u e a t t h e t r a n s m i t b u f f e r i n t h e a b o v e t i m i n g .
N o t e 2 : T x D
N o t e 3 : i = 0 t o 3
The above timing applies to the following settings :
S h o w n i n ( ) a r e b i t s y m b o l s .
• Parity is enabled.
• One stop bit.
• Transmit interrupt cause select bit = “1”.
“ 1 ”
“ 0 ”
“1”
“ 0 ”
“ 1 ”
“ 0 ”
“ 1 ”
“ 0 ”
T x D i a n d R x D i s h o u l d b e t h e s a m e , b u t t h e o u t p u t s i g n a l s a r e s h o w n s e p a r a t e l y f o r e a s e o f u n d e r s t a n d i n g . A l s o , t h e s i g n a l
l e v e l r e s u l t i n g f r o m c o n n e c t i n g T x D
( 1 ) T r a n s m i s s i o n e n a b l e d
i
page 74 of 354
a n d R x D
Note1: TxDi pin is N-channel open drain and needs a pull-up resistance.
Note2: i=0 to 3
( 2 ) S t a r t t r a n s m i s s i o n
Start
S T
S T
D a t a i s s e t i n U A R T i t r a n s m i t b u f f e r r e g i s t e r
bit
i
a r e c o n n e c t e d i n t h e m a n n e r o f w i r e d O R a s s h o w n i n t h e c o n n e c t i o n d i a g r a m . T h e r e f o r e , t h e s i g n a l l e v e l s o f
D
D
0
0
Microcomputer
D
D
1
1
T c
D
D
2
2
D
D
RxD
TxD
3
3
D
D
4
4
i
T r a n s f e r r e d f r o m U A R T i t r a n s m i t b u f f e r r e g i s t e r t o U A R T i t r a n s m i t r e g i s t e r
a n d R x D
i
i
D
D
5
5
D
D
6
6
C l e a r e d t o “ 0 ” w h e n i n t e r r u p t r e q u e s t i s a c c e p t e d , o r c l e a r e d b y s o f t w a r e
i
D
D
i s s h o w n a s a s i g n a l l i n e l e v e l .
Parity
7
7
bit
Tc = 16 (n + 1) / fi or 16 (n + 1) / f
P
P
SP
S P
Stop
f
( 3 ) C o n f i r m s t o p b i t
EXT :
bit
(Note1)
fi : frequency of BRGi count source (f
n : value set to BRGi
frequency of BRGi count source (external clock)
( 4 ) S t a r t t r a n s m i s s i o n
(Note 1)
ST
ST
D e t e c t s t h e l e v e l
u s i n g a n i n t e r r u p t
r o u t i n e
SIM card
S i n c e a p a r i t y e r r o r o c c u r r e d , t h e
“ L ” l e v e l r e t u r n s f r o m S I M c a r d
D
D
0
0
D
D
1
1
D
D
2
2
EXT
D
D
3
3
D
D
4
4
D
D
5
5
1
, f
D
D
8
6
6
, f
32
D
D
7
7
)
P
P
S P
SP
(5) Dispose
parity error
Detects the level
using an interrupt
routine
2. SIM interface