m5m51016btp Renesas Electronics Corporation., m5m51016btp Datasheet - Page 340

• Manufacturer Part Number: m5m51016btp
• Description: Renesas 16-bit Single-chip Microcomputer M16c Family / M16c/20 Series
• Manufacturer: Renesas Electronics Corporation.

M30245 Group
Rev.2.00 Oct 16, 2006
REJ09B0340-0200
4.2 Data Access
Figure 4.2.1. Level of BYTE pin and external data bus width
4.2.1 Data Bus Width
If the voltage level input to the BYTE pin is “H”, the external data bus width becomes 8 bits, and P1
through P1
If the voltage level input to the BYTE pin is “L”, the external data bus width becomes 16 bits, and P0
through P0
N o t e 1 : C a n b e s w i t c h e d t o I / O p o r t u s i n g t h e p o r t P 4
N o t e 2 : W h e n r e s e t , o n l y C S
N o t e 3 : T h e f e a t u r e c a n b e s w i t c h e d u s i n g t h e R / W m o d e s e l e c t b i t o f p r o c e s s o r m o d e r e g i s t e r 0 ( a d d r e s s 0 0 0 4
7
7
(/D
(/D
I / O p o r t s c a n b e s w i t c h e d u s i n g t h e C S i o u t p u t e n a b l e b i t o f t h e c h i p s e l e c t c o n t r o l r e g i s t e r ( a d d r e s s 0 0 0 8
7
15
), and P1
page 331 of 354
) can be used as I/O ports (Figure 4.2.1).
B u s w i d t h : 8 - b i t ( B Y T E = “ H ” )
B u s w i d t h : 1 6 - b i t ( B Y T E = “ L ” )
M i c r o c o m p u t e r
M i c r o c o m p u t e r
0
(/D
0
o u t p u t s a c h i p s e l e c t s i g n a l . C S
P0
P1
P2
P3
P4
P4
P5
P5
P0
P1
P2
P3
P4
P4
P5
P5
8
) through P1
0
0
0
0
0
4
0
3
0
0
0
0
0
4
0
3
to P0
to P1
to P2
to P3
to P4
to P4
to P5
to P5
to P0
to P1
to P2
to P3
to P4
to P4
to P5
to P5
7
7
7
7
3
7
2
7
7
7
7
7
3
7
2
7
R D , W R L , W R H / R D , B H E , W R ( N o t e 3 )
RD,WRL,WRH / RD,BHE,WR (Note 3)
A d d r e s s b u s A
C h i p s e l e c t C S 0 t o C S 3 ( N o t e 2 )
B C L K , H L D A , H O L D , A L E , R D Y
A d d r e s s b u s A
C h i p s e l e c t C S 0 t o C S 3 ( N o t e 2 )
BCLK, HLDA, HOLD, ALE, RDY
7
A d d r e s s b u s A
A d d r e s s b u s A
0
(/D
D a t a b u s D
D a t a b u s D
D a t a b u s D
t o P 4
15
I / O p o r t
3
) operate as a data bus (D
1
1 6
1 6
f u n c t i o n s e l e c t b i t s o f p r o c e s s o r m o d e r e g i s t e r 0 ( a d d r e s s 0 0 0 4
t h r o u g h C S
t o A
t o A
8
0
0
0
0
t o D
t o D
t o D
t o A 1
t o A 1
1 9
1 9
( N o t e 1 )
1 5
( N o t e 1 )
7
7
5
5
3
b e c o m e i n p u t p o r t s .
E x t e r n a l d e v i c e
E x t e r n a l d e v i c e
0
through D
1 6
1 6
) .
15
) .
) (Figure 4.2.1).
4. External Buses
1 6
) .
0
0
(/D
(/D
8
0
)
)