tmp89fm42a TOSHIBA Semiconductor CORPORATION, tmp89fm42a Datasheet - Page 37

• Manufacturer Part Number: tmp89fm42a
• Description: 8 Bit Microcontroller
• Manufacturer: TOSHIBA Semiconductor CORPORATION

2.3
System clock controller
RA000
Warm-up counter control register
Warm-up counter data register
(0x0FCD)
(0x0FCE)
WUCCR
WUCDR
Note 1: fosc: Internal high-frequency clock [Hz], fc: External high-frequency clock [Hz], fcgck: Gear clock [Hz], fs: External low-
Note 2: WDT: Watchdog timer, TG: Timing generator
Note 3: Don't set both SYSCR2<IDLE> and SYSCR2<TGHALT> to "1" simultaneously.
Note 4: Writing of the second byte data will be executed improperly if the operation is switched to the IDLE state by an instruction,
Note 5: When the IDLE1/2 or SLEEP1 mode is released, SYSCR2<IDLE> is cleared to "0" automatically.
Note 6: When the IDLE0 or SLEEP0 mode is released, SYSCR2<TGHALT> is cleared to "0" automatically.
Note 7: Bits 1 and 0 of SYSCR2 are read as "0".
Note 8: Do not set both SYSCR2<OSCEN> and SYSCR2<XEN> to "1" simultaneously except when switching the high-frequency
Note 1: fosc : Internal high-frequency clock [Hz], fc: External high-frequency clock [Hz], fcgck: Gear clock [Hz], fs: External low-
Note 2: WUCCR<WUCRST> is cleared to "0" automatically, and need not be cleared to "0" after being set to "1".
Note 3: Bits 7 to 4 of WUCCR are read as "0".
Note 4: Before starting the warm-up counter operation, set the source clock and the frequency division rate at WUCCR<WUCSEL,
Note 1: Don't start the warm-up counter operation with WUCDR set at "0x00".
WUCRST
WUCSEL
WUCDIV
WUCDR
Read/Write
Read/Write
Bit Symbol
Bit Symbol
frequency clock [Hz]
such as LDW, which executes 2-byte data transfer at a time.
reference clock (fh). ( When the switching of the reference clock (fh) is complete, one of the two high-frequency clocks
not to be used should be stopped.)
After reset
frequency clock [Hz]
WUCDIV> and set the warm-up time at WUCDR.
After reset
Resets and stops the warm-up coun-
ter
Selects the frequency division of the
warm-up counter source clock
Selects the warm-up counter source
clock
WUCRST
W
7
0
7
0
R
6
0
6
1
-
R
5
0
5
1
00 :
01 :
10 :
11 :
00 :
01 :
10 :
11 :
-
Page 18
0 :
1 :
-
Clear and stop the counter
Source clock
Source clock / 2
Source clock / 2
Source clock / 2
Select the internal high-frequency clock (fosc)
Select the external high-frequency clock (fc)
Select the external low-frequency clock (fs)
Reserved
Warm-up time setting
R
4
0
4
0
-
WUCDR
R/W
2
3
3
1
3
0
WUCDIV
R/W
2
1
2
1
1
0
1
1
TMP89FM42A
WUCSEL
R/W
0
0
0
0