tmp89fm42a TOSHIBA Semiconductor CORPORATION, tmp89fm42a Datasheet - Page 52

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tmp89fm42a

Manufacturer Part Number
tmp89fm42a
Description
8 Bit Microcontroller
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet

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Note 1: The NORMAL1 and NORMAL2 modes are generically called the NORMAL mode; the SLOW1 and SLOW2 modes
Note 2: The mode is released by the falling edge of the source clock selected at TBTCR<TBTCK>.
Note 3: Switching between the internal high-frequency clock and the external high-frequency clock must be done during the
2.3.5.4
are called the SLOW mode; the IDLE0, IDLE1 and IDLE2 modes are called the IDLE mode; and the SLEEP0 and
SLEEP1 are called the SLEEP mode.
NORMAL1 or NORMAL2 mode. For details, refer to "(1) High-frequency reference clock (fh)".
SLEEP1
Dual-clock mode
Single-clock mode
IDLE1
IDLE2
mode
mode
mode
Transition of operation modes
SYSCR2<IDLE> = "1"
SYSCR2<IDLE> = "1"
Figure 2-9 Operation Mode Transition Diagram
SYSCR2<IDLE> = "1"
Interrupt
Interrupt
Interrupt
SYSCR2<OSCEN> = "1"
SYSCR2<SYSCK> = "0"
SYSCR2<XEN> = "1" or
SYSCR2<XTEN> = "0"
SYSCR2<TGHALT>=”1”
NORMAL2 mode
NORMAL1 mode
high-frequency
clock operation
high-frequency
clock operation
External
External
(Note 2)
Page 33
SLEEP0
SLOW2
SLOW1
mode
mode
mode
clock operation
clock operation
high-frequency
high-frequency
SYSCR2<TGHALT> = “1”
SYSCR2<XTEN> = "1"
SYSCR2<XEN> = "0" or
SYSCR2<OSCEN> = "0"
SYSCR2<SYSCK> = "1"
Internal
Internal
IDLE0
mode
(Note 3)
(Note 3)
(Note 2)
SYSCR1<STOP> =”1”
STOP mode release signal
STOP mode release signal
STOP mode release signal
SYSCR1<STOP> = “1”
SYSCR1<STOP> = “1”
Warm-up completed
Warm-up that
follows reset
release
Reset release
STOP
RESET
mode
TMP89FM42A

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