tmp89fm42a TOSHIBA Semiconductor CORPORATION, tmp89fm42a Datasheet - Page 54

• Manufacturer Part Number: tmp89fm42a
• Description: 8 Bit Microcontroller
• Manufacturer: TOSHIBA Semiconductor CORPORATION

RA000
Note:
SSTOPH:
When the STOP mode is released, the warm-up counter source clock automatically changes to the clock that
generated the main system clock when the STOP mode was started, regardless of WUCCR<WUCSEL>.
Example: Starting the STOP mode from NORMAL mode after testing P00 port.
Note:During the STOP period (from the start of the STOP mode to the end of the warm-up), due to
LD
TEST
J
LD
LD
DI
SET
(Warm-up time at release of the STOP mode is about 300μs at fc= 10MHz.)
2. Release by key-on wakeup
3. Release by the voltage detection circuits
1. Release by the STOP pin
changes in the external interrupt pin signal, interrupt latches may be set to "1" and interrupts may
be accepted immediately after the STOP mode is released. Before starting the STOP mode,
therefore, disable interrupts. Also, before enabling interrupts after STOP mode is released, clear
unnecessary interrupt latches.
edge-sensitive release mode, either of which can be selected at SYSCR1<RELM>.
Release the STOP mode by using the STOP pin.
The STOP mode release by the STOP pin includes the level-sensitive release mode and the
The STOP pin is also used as the P11 port and the INT5 (external interrupt input 5) pin.
(SYSCR1), 0x40
(P0PRD). 5
F, SSTOPH
(WUCCR), 0x01
(WUCDR),0x2F
(SYSCR1).7
- Level-sensitive release mode
Note: When the STOP mode is released, the warm-up counter source clock automatically changes
the long term battery backup.
is high, the STOP mode does not start. Thus, to start the STOP mode in the level-sensitive
release mode, it is necessary for the program to first confirm that the STOP pin input is
low.
The STOP mode is released by setting the STOP pin high.
Setting SYSCR1<RELM> to "1" selects the level-sensitive release mode.
This mode is used for the capacitor backup when the main power supply is cut off and
Even if an instruction for starting the STOP mode is executed while the STOP pin input
This can be confirmed by testing the port by the software or using interrupts
to the clock that generated the main system clock when the STOP mode was started, regard-
less of WUCCR<WUCSEL>.
Page 35
;Sets up the level-sensitive release mode
;Wait until STOP pin becomes L level.
;WUCCR<WUCDIV> = 00 (No division) (Note)
;Sets the warm-up time
;300μs / 6.4μs = 46.9 → round up to 0x2F
;IMF = 0
;Starts the STOP mode
TMP89FM42A