mc9s08dz32 Freescale Semiconductor, Inc, mc9s08dz32 Datasheet - Page 104

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mc9s08dz32

Manufacturer Part Number
mc9s08dz32
Description
Hcs08 Microcontrollers 8-bit Can Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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1
1
Chapter 6 Parallel Input/Output Control
6.5.5
Port E is controlled by the registers listed below.
6.5.5.1
6.5.5.2
104
PTEDD[7:0]
PTED[7:0]
Reset:
Reads of this bit always return the pin value of the associated pin, regardless of the value stored in the port data direction bit.
Reset:
PTEDD1 has no effect on the input-only PTE1 pin.
Field
Field
7:0
7:0
W
W
R
R
PTEDD7
PTED7
Port E Registers
Port E Data Register Bits — For port E pins that are inputs, reads return the logic level on the pin. For port E
pins that are configured as outputs, reads return the last value written to this register.
Writes are latched into all bits of this register. For port E pins that are configured as outputs, the logic level is
driven out the corresponding MCU pin.
Reset forces PTED to all 0s, but these 0s are not driven out the corresponding pins because reset also configures
all port pins as high-impedance inputs with pull-ups disabled.
Data Direction for Port E Bits — These read/write bits control the direction of port E pins and what is read for
PTED reads.
0 Input (output driver disabled) and reads return the pin value.
1 Output driver enabled for port E bit n and PTED reads return the contents of PTEDn.
Port E Data Register (PTED)
0
Port E Data Direction Register (PTEDD)
0
7
7
PTEDD6
PTED6
0
0
6
6
Figure 6-33. Port E Data Direction Register (PTEDD)
Table 6-31. PTEDD Register Field Descriptions
Table 6-30. PTED Register Field Descriptions
Figure 6-32. Port E Data Register (PTED)
PTEDD5
MC9S08DZ60 Series Data Sheet, Rev. 3
PTED5
0
0
5
5
PTEDD4
PTED4
0
0
4
4
Description
Description
PTEDD3
PTED3
3
0
3
0
PTEDD2
PTED2
0
0
2
2
PTEDD1
PTED1
Freescale Semiconductor
0
0
1
1
1
1
PTEDD0
PTED0
0
0
0
0

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