mc9s08dz32 Freescale Semiconductor, Inc, mc9s08dz32 Datasheet - Page 15

• Manufacturer Part Number: mc9s08dz32
• Description: Hcs08 Microcontrollers 8-bit Can Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Section Number
12.4 Programmer’s Model of Message Storage .....................................................................................241
12.5 Functional Description ...................................................................................................................250
12.6 Initialization/Application Information ...........................................................................................269
13.1 Introduction ....................................................................................................................................271
13.2 External Signal Description ...........................................................................................................276
13.3 Modes of Operation........................................................................................................................277
13.4 Register Definition .........................................................................................................................277
13.5 Functional Description ...................................................................................................................282
Freescale Semiconductor
12.3.14MSCAN Transmit Error Counter (CANTXERR) ..........................................................239
12.3.15MSCAN Identifier Acceptance Registers (CANIDAR0-7) ............................................239
12.3.16MSCAN Identifier Mask Registers (CANIDMR0–CANIDMR7) .................................240
12.4.1 Identifier Registers (IDR0–IDR3) ...................................................................................244
12.4.2 IDR0–IDR3 for Standard Identifier Mapping .................................................................246
12.4.3 Data Segment Registers (DSR0-7) .................................................................................247
12.4.4 Data Length Register (DLR) ...........................................................................................248
12.4.5 Transmit Buffer Priority Register (TBPR) ......................................................................249
12.4.6 Time Stamp Register (TSRH–TSRL) .............................................................................249
12.5.1 General ............................................................................................................................250
12.5.2 Message Storage .............................................................................................................251
12.5.3 Identifier Acceptance Filter .............................................................................................254
12.5.4 Modes of Operation ........................................................................................................261
12.5.5 Low-Power Options ........................................................................................................262
12.5.6 Reset Initialization ..........................................................................................................267
12.5.7 Interrupts .........................................................................................................................267
12.6.1 MSCAN initialization .....................................................................................................269
12.6.2 Bus-Off Recovery ...........................................................................................................270
13.1.1 Features ...........................................................................................................................273
13.1.2 Block Diagrams ..............................................................................................................273
13.1.3 SPI Baud Rate Generation ..............................................................................................275
13.2.1 SPSCK — SPI Serial Clock ............................................................................................276
13.2.2 MOSI — Master Data Out, Slave Data In ......................................................................276
13.2.3 MISO — Master Data In, Slave Data Out ......................................................................276
13.2.4 SS — Slave Select ...........................................................................................................276
13.3.1 SPI in Stop Modes ..........................................................................................................277
13.4.1 SPI Control Register 1 (SPIC1) ......................................................................................277
13.4.2 SPI Control Register 2 (SPIC2) ......................................................................................278
13.4.3 SPI Baud Rate Register (SPIBR) ....................................................................................279
13.4.4 SPI Status Register (SPIS) ..............................................................................................280
13.4.5 SPI Data Register (SPID) ................................................................................................281
Serial Peripheral Interface (S08SPIV3)
MC9S08DZ60 Series Data Sheet, Rev. 3
Chapter 13
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