mc9s08sg4 Freescale Semiconductor, Inc, mc9s08sg4 Datasheet - Page 145
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mc9s08sg4
Manufacturer Part Number
mc9s08sg4
Description
8-bit Microcontroller Family
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MC9S08SG4.pdf
(320 pages)
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10.1.2
Key features of the ICS module follow. For device specific information, refer to the ICS Characteristics in
the Electricals section of the documentation.
10.1.3
Figure 10-2
Freescale Semiconductor
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Frequency-locked loop (FLL) is trimmable for accuracy
— 0.2% resolution using internal 32kHz reference
— 2% deviation over voltage and temperature using internal 32kHz reference
Internal or external reference clocks up to 5MHz can be used to control the FLL
— 3 bit select for reference divider is provided
Internal reference clock has 9 trim bits available
Internal or external reference clocks can be selected as the clock source for the MCU
Whichever clock is selected as the source can be divided down
— 2 bit select for clock divider is provided
Control signals for a low power oscillator as the external reference clock are provided
— HGO, RANGE, EREFS, ERCLKEN, EREFSTEN
FLL Engaged Internal mode is automatically selected out of reset
– Allowable dividers are: 1, 2, 4, 8
– BDC clock is provided as a constant divide by 2 of the DCO output
Features
Block Diagram
is the ICS block diagram.
MC9S08SG8 MCU Series Data Sheet, Rev. 3
Chapter 10 Internal Clock Source (S08ICSV2)
145
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