mc9s08sg4 Freescale Semiconductor, Inc, mc9s08sg4 Datasheet - Page 240
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mc9s08sg4
Manufacturer Part Number
mc9s08sg4
Description
8-bit Microcontroller Family
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MC9S08SG4.pdf
(320 pages)
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Chapter 16 Timer/PWM Module (S08TPMV3)
When a channel is configured for edge-aligned PWM (CPWMS=0, MSnB=1 and ELSnB:ELSnA not =
0:0), the data direction is overridden, the TPMxCHn pin is forced to be an output controlled by the TPM,
and ELSnA controls the polarity of the PWM output signal on the pin. When ELSnB:ELSnA=1:0, the
TPMxCHn pin is forced high at the start of each new period (TPMxCNT=0x0000), and the pin is forced
low when the channel value register matches the timer counter. When ELSnA=1, the TPMxCHn pin is
forced low at the start of each new period (TPMxCNT=0x0000), and the pin is forced high when the
channel value register matches the timer counter.
240
TPMxCNTH:TPMxCNTL
TPMxCNTH:TPMxCNTL
TPMxMODH:TPMxMODL = 0x0008
TPMxMODH:TPMxMODL = 0x0005
TPMxMODH:TPMxMODL = 0x0008
TPMxMODH:TPMxMODL = 0x0005
Figure 16-3. High-True Pulse of an Edge-Aligned PWM
Figure 16-4. Low-True Pulse of an Edge-Aligned PWM
TPMxCHn
TPMxCHn
CHnF BIT
CHnF BIT
TOF BIT
TOF BIT
MC9S08SG8 MCU Series Data Sheet, Rev. 3
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Freescale Semiconductor
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