m30262f8gp Renesas Electronics Corporation., m30262f8gp Datasheet - Page 119

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m30262f8gp

Manufacturer Part Number
m30262f8gp
Description
Renesas 16-bit Cmos Single-chip Microcomputer M16c Family / M16c/20 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet

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Serial I/O
Figure 1.15.5. Serial I/O-related registers (2)
UARTi transmit/receive mode register
UARTi transmit/receive control register 0
b7
0
b7
b6
b6
b5
b5
b4
b4
Preliminary Specifications Rev. 0.9
Specifications in this manual are tentative and subject to change.
b3
b3
b2
b2
b1
b1
b0
b0
Note 1: Set the corresponding port direction register to “0”.
Note 2: Periperal clock select register bit PCLK1 is used to select between f
Note 3: The settings of the corresponding port register and port direction register are invalid.
UFORM Transfer format select bit
CKPOL
symbol
symbol
TXEPT
CKDIR
SMD0
SMD1
SMD2
PRYE
CRS
STPS
Reserved
CLK0
CLK1
CRD
NCH
PRY
Bit
Bit
UiMR(i=0,1)
UiC0(i=0,1)
Symbol
Symbol
Serial I/O mode
select bits
Internal/external clock
select bit
Stop bit length select bit
Odd/even parity select bit
Parity enable bit
BRG count source
select bits
CTS/RTS function
select bit
Transmit register empty
flag
CTS/RTS disable bit
Data output select bit
CLK polarity select bit
Bit name
Bit name
Renesas Technology Corp.
03A4
03A0
Address
Address
16
16
, 03AC
, 03A8
0 0 : f
0 1 : f
1 0 : f
1 1 : Inhibited
Valid when bit 4 = “0”
0 : CTS function is selected (Note 1)
1 : RTS function is selected (Note 3)
0 : Data present in transmit
1 : No data present in transmit
0 : CTS/RTS function enabled
1 : CTS/RTS function disabled
0 : TXDi pin is CMOS output
1 : TXDi pin is N-channel
0 : Transmit data is output at
1 : Transmit data is output at
0 : LSB first
1 : MSB first
b1 b0
0 : Internal clock
1 : External clock
Invalid
Invalid
Invalid
Must always be “0”
(During clock synchronous
(During clock synchronous
Must be fixed to 001
0 0 0 : Serial I/O invalid
0 1 0 : Inhibited
0 1 1 : Inhibited
1 1 1 : Inhibited
register (during transmission)
register (transmission
completed)
b2 b1 b0
16
(P6
programmable I/O port)
open-drain output
falling edge of transfer clock
and receive data is input at
rising edge
rising edge of transfer clock
and receive data is input at
falling edge
16
(Note 2)
1SIO
8SIO
32SIO
0
serial I/O mode)
serial I/O mode)
When reset
and P6
When reset
or f
is selected
Function
Function
08
is selected
00
16
2SIO
4
16
function as
is selected
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Must always be “0”
b1 b0
0 0 : f
0 1 : f
1 0 : f
1 1 : Inhibited
Valid when bit 4 = “0”
0 : CTS function is selected (Note 1)
1 : RTS function is selected (Note 3)
0 : Data present in transmit register
1 : No data present in transmit
0 : CTS/RTS function enabled
1 : CTS/RTS function disabled
0: TXDi pin is CMOS output
1: TXDi pin is N-channel
Must always be “0”
0 : Internal clock
1 : External clock (Note 1)
0 : One stop bit
1 : Two stop bits
Valid when bit 6 = “1”
0 : Odd parity
1 : Even parity
0 : Parity disabled
1 : Parity enabled
1 0 0 : Transfer data 7 bits long
1 0 1 : Transfer data 8 bits long
1 1 0 : Transfer data 9 bits long
0 0 0 : Serial I/O invalid
0 1 0 : Inhibited
0 1 1 : Inhibited
1 1 1 : Inhibited
b2 b1 b0
open-drain output
(during transmission)
register (transmission completed)
(P6
programmable I/O port)
(Note 2)
1SIO
8SIO
32SIO
(During UART mode)
(During UART mode)
0
and P6
or f
is selected
is selected
Function
Function
2SIO
4
1SIO
function as
is selected
and f
M16C/26 Group
2SIO
.
R
R
W
W
113

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