m30262f8gp Renesas Electronics Corporation., m30262f8gp Datasheet - Page 68

• Manufacturer Part Number: m30262f8gp
• Description: Renesas 16-bit Cmos Single-chip Microcomputer M16c Family / M16c/20 Series
• Manufacturer: Renesas Electronics Corporation.

Precautions for Interrupts
62
Precautions for Interrupts
Figure 1.9.13. Switching condition of INT interrupt request
(1) Reading address 00000
(2) Setting the stack pointer
(3) The NMI interrupt
(4) External interrupt
• Do not read address 00000
• The value of the stack pointer immediately after reset is initialized to 0000
•The NMI interrupt is enabled or disabled in bit4 of the processor mode register 2. It is disabled by
• The NMI interrupt input level can be determined by reading the contents of the P8 register.
• If NMI is enabled, do not attempt to go into stop mode with the NMI input in the “L” state. With the NMI
• If NMI is enabled, going into wait mode with the NMI input in the “L” state does not reduce the power
• Signal input to the NMI pin require an “L” level of '2 cycles of BCLK + 300ns' or more.
• Either an “L” level or an “H” level of at least 250 ns width is necessary for the signal input to pins INT
When a maskable interrupt is generated, the CPU reads the interrupt information (the interrupt number
When using the NMI interrupt, initialize the stack pointer at the beginning of the program. Concerning the
and interrupt request level) in the interrupt sequence. The interrupt request bit of this interrupt is written
in address 00000
one.
before setting a value in the stack pointer may cause a runaway program. Be sure to set a value in the
stack pointer before accepting an interrupt.
first instruction immediately after reset, the generation of any interrupts, including the NMI interrupt, is
prohibited.
default (the pin is used as P8
input in the “L” state, the CM10 is fixed to “0”, therefore, any attempt to go into stop mode is turned
down.
consumption. With the NMI input in the “L” state, the CPU stops but the oscillation is not stop, so
power consumption is not reduced. Having NMI in "L" state when going into a wait mode may also
cause an unpredictable behavior of the program.
, INT
1,
INT
Preliminary Specifications Rev. 0.9
Specifications in this manual are tentative and subject to change.
3
through INT
16
. Therefore, reading 00000
5
regardless of the CPU operation clock.
Note: Execute the setting above individually. Don't execute two or
16
5
by software.
(Enable the accepting of INTi interrupt request)
)after reset. Once enabled, it stays enabled until a reset is applied.
16
Set the interrupt priority level to level 1 to 7
more settings at once(by one instruction).
Set the interrupt priority level to level 0
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Clear the interrupt enable flag to 0
Clear the interrupt request bit to 0
Set the interrupt enable flag to 1
Set the polarity select bit
(Disable INT
(Disable interrupt)
(Enable interrupt)
16
may cancel the interrupt or generate an unexpected
i
interrupt)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
16
. Accepting an interrupt
M16C/26 Group
0