m30262f8gp Renesas Electronics Corporation., m30262f8gp Datasheet - Page 48
m30262f8gp
Manufacturer Part Number
m30262f8gp
Description
Renesas 16-bit Cmos Single-chip Microcomputer M16c Family / M16c/20 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.M30262F8GP.pdf
(239 pages)
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Power Control
42
Transition of normal mode
Figure 1.8.8. State transition diagram of power control mode
Transition of stop mode, wait mode
Preliminary Specifications Rev. 0.9
Specifications in this manual are tentative and subject to change.
All oscillators stopped
All oscillators stopped
All oscillators stopped
Note 1: When bit PM21 = "0" (system clock protective function unused).
Note 2: The ring oscillator clock divided by 8 provides BCLK.
Note 3: Switch clock after oscillation of main clock is sufficiently stable.
Note 4: Switch clock after oscillation of sub clock is sufficiently stable.
Note 5: Change CM06 after changing CM17 and CM16.
Stop mode
Stop mode
Stop mode
Stop mode
CM06 = 0
(Notes 3, 5)
Interrupt
CM10=1
CM10=1
CM10=1
CM10=1
Main clock is oscillating
Medium-speed mode
CM07 = 0
CM17 = 0 CM16 = 0
CM07 = 0 CM06 = 0
CM17 = 1 CM16 = 0
Interrupt
Sub clock is oscillating
(divided-by-4 mode)
Interrupt
(Note 2)
Interrupt
High-speed mode
BCLK : f(X
BCLK : f(X
CM04 = 0
Medium-speed mode
CM07 = 0 CM06 = 0
CM17 = 1 CM16 = 0
CM07 = 0 CM06 = 0
CM17 = 0 CM16 = 0
(divided-by-4 mode)
CM06 = 1
High-speed mode
CM06 =
BCLK : f(X
IN
BCLK : f(X
IN
)/4
dissipation
low powe
)
When
mode
Renesas Technology Corp.
0
IN
Main clock is oscillating
r
IN
)/4
Sub clock is stopped
Ring oscillator, Ring oscillator
)
low-speed
When
mode
Medium-speed mode
Low-speed/low power
(divided-by-8 mode)
dissipation mode
dissipation mode
Main clock is oscillating
Medium-speed mode
CM07 = 0 CM06 = 0
CM17 = 0 CM16 = 1
CM07 = 0 CM06 = 0
CM17 = 1 CM16 = 1
CM07 = 0 CM06 = 1
CM04 = 0
Sub clock is stopped
(divided-by-8 mode)
Medium-speed mode
(divided-by-16 mode)
Medium-speed mode
CM03="1"
(divided-by-2 mode)
(Refer to the following for the transition of normal mode.)
Normal mode
High-speed/medium-
Reset
BCLK : f(X
BCLK : f(X
CM04 = 1
BCLK : f(X
speed mode
Medium-speed mode
(divided-by-16 mode)
CM07 = 0 CM06 = 0
CM17 = 0 CM16 = 1
CM07 = 0 CM06 = 0
CM17 = 1 CM16 = 1
Medium-speed mode
(divided-by-2 mode)
IN
BCLK : f(X
IN
BCLK : f(X
)/16
IN
)/2
)/8
CM04 = 1
(Notes 3, 5)
IN
IN
)/16
)/2
Medium-speed mode
(divided-by-8 mode)
BCLK : f(X
WAIT
instruction
WAIT
instruction
WAIT
instruction
(Note 1)
Interrupt
WAIT
instruction
(Note 1)
Interrupt
Interrupt
Interrupt
CM07 = 0
CM06 = 1
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
CM07 = 0 (Note 3)
CM06 = 0 (Note 5)
CM04 = 1
IN
)/8
CPU operation stopped
Wait mode
Wait mode
Wait mode
Wait mode
CM07 = 0 (Note 3)
CM06 = 1
CM04 = 0
CM07 = 1 (Note 4)
CM05 = 1
CM07 = 0
(Note 3, 5)
CM07 = 1
(Note 4)
CM05 = 0
M16C/26 Group
Main clock is oscillating
CM07 = 1 , CM06 = 1
Sub clock is oscillating
Sub clock is oscillating
Main clock is stopped
Low power
dissipation mode
Low-speed mode
BCLK : f(X
BCLK : f(X
CM15 = 1
CM07 = 1
CM05 = 1
CIN
CIN
)
)
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