m30262f8gp Renesas Electronics Corporation., m30262f8gp Datasheet - Page 134

• Manufacturer Part Number: m30262f8gp
• Description: Renesas 16-bit Cmos Single-chip Microcomputer M16c Family / M16c/20 Series
• Manufacturer: Renesas Electronics Corporation.

Clock Asynchronous Serial I/O (UART) Mode
128
Clock Asynchronous Serial I/O (UART) Mode
Table 1.15.7. Specifications of UART Mode (1)
Note 1: ‘n’ denotes the value 00
Note 2: f
Note 3: If an overrun error occurs, the UARTi receive buffer will have the next data written in. Note also that
Transfer data format
Transfer clock
Transmission/reception control
Transmission start condition
Reception start condition
Interrupt request
generation timing
Error detection
The UART mode allows transmitting and receiving data after setting the desired transfer rate and
transfer data format. Tables 1.15.7 and 1.15.8 list the specifications of the UART mode. Figure
1.15.18 shows the UARTi transmit/receive mode register.
the UARTi receive interrupt request bit does not change.
EXT
Item
Preliminary Specifications Rev. 0.9
is input from the CLKi pin.
Specifications in this manual are tentative and subject to change.
• Character bit (transfer data): 7 bits, 8 bits, or 9 bits as selected
• Start bit: 1 bit
• Parity bit: Odd, even, or nothing as selected
• Stop bit: 1 bit or 2 bits as selected
• When internal clock is selected (bit 3 at addresses 03A0
• When external clock is selected (bit 3 at addresses 03A0
•
• To start transmission, the following requirements must be met:
- Transmit enable bit (bit 0 at addresses 03A5
- Transmit buffer empty flag (bit 1 at addresses 03A5
- When CTS function selected, CTS input level = “L”
• To start reception, the following requirements must be met:
• When transmitting
-
- Transmit interrupt cause select bits (bits 0, 1 at address 03B0
•
- Interrupts requested when data transfer from UARTi receive register to
• Overrun error (Note 3)
• Framing error
• Parity error
• Error sum flag
- Receive enable bit (bit 2 at addresses 03A5
- Start bit detection
f
address 037D
transfer buffer register to UARTi transmit register is completed
address 037D
UARTi transfer register is completed
When receiving
UARTi receive buffer register is completed
Generated 6.5, 7, or 8.5 clock periods after the device started receiving the
next data before reading out the contents of the UARTi receive buffer register.
This error occurs when the number of stop bits set is not detected
This error occurs when if parity is enabled, the number of 1’s in parity and
character bits does not match the number of 1’s set
This flag is set (= 1) when any of the overrun, framing, and parity errors is
encountered
T
fi/16 (n+1) (Note 1)
EXT
CTS
ransmit interrupt cause select bits (bits 0,1 at address 03B0
16
/16(n+1) (Note 1) (Note 2)
to FF
function,
Renesas Technology Corp.
16
that is set to the UARTi bit rate generator.
16
16
RTS
) = “0”: Interrupts requested when data transfer from UARTi
) = “1”: Interrupts requested when data transmission from
function,
Specification
fi = f
CTS
1SIO
and
, f
RTS
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
2SIO,
function disabled: selectable
f
8SIO
16
16
, 03AD
, 03AD
, f
32SIO
16
16
16
, 03AD
, 03A8
, 03A8
16
16
, 037D
, 037D
M16C/26 Group
16
16
16
, 0378
, 0378
, 037D
16
16
16
16
, bit4 at
, bit4 at
) = “1”
) = “1”
16
16
16
= “0”) :
=“1”) :
) = “0”