r8a77850anbg Renesas Electronics Corporation., r8a77850anbg Datasheet - Page 1320
r8a77850anbg
Manufacturer Part Number
r8a77850anbg
Description
Renesas 32-bit Risc Microcomputer Superh? Risc Engine Family
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.R8A77850ANBG.pdf
(1692 pages)
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25. Audio Codec Interface (HAC)
25.5.5
Figure 25.3 shows an example of the initialization sequence.
Rev.1.00 Jan. 10, 2008 Page 1290 of 1658
REJ09B0261-0100
External codec
HAC module
initialization
initialization
device
Notes: 1. Register values are reference data.
Initialization Sequence
2. For details on DMAC settings, refer to section 14, Direct Memory Access Controller (DMAC)
(Set HACACR to H'05E0 0000: 20-bit DMA, TX slots and 2 atomic control)*
Set read address to #h'26 (Power-down mode Ctrl/Stat)
Figure 25.3 Initialization Sequence
Set read volume and sampling rate
(1) HACACR = H'0000 0000
(2) Set HACCSAR and HACCSDR
(3) HACACR = H'01E0 0000
(Set HACCCR to H'0000 8000: 20-bit DMA,
(Set HACCSAR to H'000A 6000)*
ADC, DAC, Analog, REF = ready?
(Set HACCSDR to H'0000 00F0)*
Start transfer (receiver/transmitter)
TX slots and 2 atomic control)*
Off-chip codec internal status
(HACCR = H'0000 0A00)
(HACCR = H'0000 0220)
HAC cold reset
Enable TX/RX
Codec ready?
Set DMAC
START
Yes
*2
1
1
1
1
No
No
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