r8a77850anbg Renesas Electronics Corporation., r8a77850anbg Datasheet - Page 1338
r8a77850anbg
Manufacturer Part Number
r8a77850anbg
Description
Renesas 32-bit Risc Microcomputer Superh? Risc Engine Family
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.R8A77850ANBG.pdf
(1692 pages)
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26. Serial Sound Interface (SSI) Module
26.3.2
SSISR is configured by status flags that indicate the operating status of the SSI module and bits
that indicate the current channel number and word number.
Rev.1.00 Jan. 10, 2008 Page 1308 of 1658
REJ09B0261-0100
Initial value:
Initial value:
Bit
31 to 29
28
R/W:
R/W:
Bit:
Bit:
Status Register (SSISR)
Bit Name
⎯
DMRQ
31
15
⎯
⎯
R
R
0
0
⎯
⎯
30
14
R
R
0
0
⎯
29
⎯
13
R
R
0
0
Initial
Value
0
0
DMRQ UIRQ
⎯
28
12
R
R
0
0
R/W*
R/W
R
R
27
11
⎯
R
0
0
R/W*
OIRQ
26
10
⎯
R
0
0
Description
Reserved
These bits are always read as an undefined value. The
write value should always be 0.
DMA Request Status Flag
This status flag allows the CPU to see the status of the
DMA request of SSI module.
TRMD = 0 (Receive Mode):
•
•
TRMD = 1 (Transmit Mode):
•
•
IIRQ
⎯
25
R
R
1
9
0
If DMRQ = 1 then SSIRDR has unread data.
If SSIRDR is read then DMRQ = 0 until there is new
unread data.
If DMRQ = 1, SSITDR requests data to be written to
continue the transmission onto the audio serial bus.
Once data is written to SSITDR then DMRQ = 0
until further transmit data is requested.
DIRQ
24
⎯
R
R
0
8
0
23
⎯
⎯
R
R
0
7
0
22
⎯
⎯
R
R
0
6
0
21
⎯
⎯
R
5
R
0
0
20
⎯
⎯
R
4
R
0
0
CHNO1 CHNO0 SWNO
19
⎯
3
R
0
R
0
18
⎯
2
R
0
R
0
17
⎯
R
1
R
0
1
IDST
16
⎯
R
R
0
0
1
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