r8a77850anbg Renesas Electronics Corporation., r8a77850anbg Datasheet - Page 551
r8a77850anbg
Manufacturer Part Number
r8a77850anbg
Description
Renesas 32-bit Risc Microcomputer Superh? Risc Engine Family
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.R8A77850ANBG.pdf
(1692 pages)
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(Average refresh interval
12.5.6
Memory of various sizes can be connected through the settings of the SDRAM configuration
register (DBCONF). The BWIDTH bits are used to set the external data bus width, and the SPLIT
bit is used to set the size of the memory connected. The BASFT bit setting is used to move the
position of the bank address toward the lower bits; depending on the application the possibility of
page hits may be increased.
+ LV1TH)
Figure 12.7 Relation between Auto-Refresh Operation and Threshold Values
Max. value
Regarding Address Multiplexing
LV1TH
LV0TH
Refresh counter
value
0
Level 2
(Refreshing not done)
Level 1
(Refreshing during
Level 0
(Refreshing in vacant
SHwy commands)
request empty cycles)
periods between
Refreshing is done immediately
after auto-refresh is enabled
Time
Refreshing is done
during request
empty cycles
Rev.1.00 Jan. 10, 2008 Page 521 of 1658
The counter value increments
12. DDR2-SDRAM Interface (DBSC2)
the average refresh interval
by the amount of
vacant periods between
Refreshing is done in
SHwy commands
REJ09B0261-0100
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