m38039mf-xxxsp Mitsumi Electronics, Corp., m38039mf-xxxsp Datasheet - Page 110

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m38039mf-xxxsp

Manufacturer Part Number
m38039mf-xxxsp
Description
Single-chip 8-bit Cmos Microcomputer
Manufacturer
Mitsumi Electronics, Corp.
Datasheet
Fig. 101 Flash memory control register bit configuration
110
(3) Flash memory mode 3 (CPU reprogramming
mode)
The 3803/3804 group has the CPU reprogramming mode where a
built-in flash memory is handled by the central processing unit
(CPU).
In CPU reprogramming mode, the flash memory is handled by
writing and reading to/from the flash memory control register (see
Figure 101) and the flash command register (see Figure 102).
The CNV
gramming mode. It is necessary to apply the power-supply voltage
of V
Functional Outline (CPU reprogramming mode)
Figure 101 shows the flash memory control register bit configura-
tion. Figure 102 shows the flash command register bit
configuration.
Bit 0 of the flash memory control register is the CPU reprogram-
ming mode select bit. When this bit is set to “1” and V
applied to the CNVss/V
selected. Whether the CPU reprogramming mode is realized or
not is judged by reading the CPU reprogramming mode monitor
flag (bit 2 of the flash memory control register).
Bit 1 is a busy flag which becomes “1” during erase and program
execution.
PP
H from the external to this pin.
SS
pin is used as the V
7
6
0
Note: Bit 0 can be reprogrammed only when 0 V is applied to the CNV
5
4
PP
pin, the CPU reprogramming mode is
3
0
2
PP
power supply pin in CPU repro-
1
0
Flash memory control register
(FCON : address 0FFE
CPU reprogramming mode select bit (Note)
Erase/Program busy flag
CPU reprogramming mode monitor flag
Fix this bit to “0.”
Erase/Program area select bits
Fix this bit to “0.”
Not used (returns "0" when read)
0 : CPU reprogramming mode is invalid. (Normal operation mode)
1 : When applying 0 V to CNV
0 : Erase and program are completed or not have been executed.
1 : Erase/program is being executed.
0 : CPU reprogramming mode is invalid.
1 : CPU reprogramming mode is valid.
0 0 : Addresses 1000
0 1 : Addresses 1000
1 0 : Addresses 8000
1 1 : Not available
invalid. When applying V
PP
H is
16
16
16
16
)
to FFFF
to 7FFF
to FFFF
Whether these operations have been completed or not is judged
by checking this flag after each command of erase and the pro-
gram is executed.
Bits 4, 5 of the flash memory control register are the erase/pro-
gram area select bits. These bits specify an area where erase and
program is operated. When the erase command is executed after
an area is specified by these bits, only the specified area is
erased. Only for the specified area, programming is enabled; for
the other areas, programming is disabled.
Figure 103 shows the CPU mode register bit configuration in the
CPU reprogramming mode.
PP
SS
H to CNV
/V
SS
16
16
16
PP
/V
(total 60 Kbytes)
(total 28 Kbytes)
(total 32 Kbytes)
PP
pin, CPU reprogramming mode is
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
SS
pin.
/V
PP
pin, CPU reprogramming mode is valid.
MITSUBISHI MICROCOMPUTERS
3803/3804 Group

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