m38039mf-xxxsp Mitsumi Electronics, Corp., m38039mf-xxxsp Datasheet - Page 70

• Manufacturer Part Number: m38039mf-xxxsp
• Description: Single-chip 8-bit Cmos Microcomputer
• Manufacturer: Mitsumi Electronics, Corp.

MULTI-MASTER I
The 3804 group has the multi-master I
The multi-master I
cuit, conforming to the Philips I
interface, offering both arbitration lost detection and a synchro-
n o u s f u n c t i o n s , i s u s e f u l f o r t h e m u l t i - m a s t e r s e r i a l
communications.
Figure 64 shows a block diagram of the multi-master I
terface and Table 10 lists the multi-master I
functions.
This multi-master I
dress registers 0 to 2, the I
control register, the I
I
control register, the I
control circuits.
When using the multi-master I
more to system clock .
Fig. 64 Block diagram of multi-master I
70
2
C START/STOP condition control register, the I
: Purchase of MITSUBISHI ELECTRIC CORPORATIONS I
an I
Serial data
(SDA)
2
C system, provided that the system conforms to the I
S2D
S e r i a l
c l o c k
( S C L )
S I S
I
r e g i s t e r
2
C S T A R T / S T O P c o n d i t i o n c o n t r o l
S I P
2
C-BUS interface is a serial communications cir-
2
C-BUS interface consists of the I
2
S S C 4 S S C 3 S S C 2 S S C 1 S S C 0
I n t e r r u p t
g e n e r a t i n g
c i r c u i t
C control register, the I
2
C special mode status register, and other
N o i s e
e l i m i n a t i o n
c i r c u i t
2
Noise
elimination
circuit
C-BUS INTERFACE
2
C data shift register, the I
2
2
C-BUS data transfer format. This
I n t e r r u p t r e q u e s t s i g n a l
(
C-BUS interface, set 1 MHz or
S C L , S D A , I R Q
C l o c k
c o n t r o l
c i r c u i t
2
C-BUS interface.
Data
control
circuit
2
c i r c u i t
C-BUS interface
A L
c i r c u i t
B B
2
)
C status register, the
S 0 D 0 – 2
I
2
2
C clock control register
C-BUS interface
2
b7
C special mode
S 1 D
S A D 6 SAD5 S A D 4 SAD3 SAD2 SAD1 SAD0 R W B
ACK
S2
b7
b7
T I S S T S E L 10BIT
S
b 7
0
2
2
2
C slave ad-
I
I
C Standard Specification as defined by Philips.
2
2
2
C components conveys a license under the Philips I
A C K
C s l a v e a d d r e s s r e g i s t e r s 0 t o 2
B I T
C control register
C-BUS in-
2
Address comparator
I
2
C clock
M O D E
C d a t a s h i f t r e g i s t e r
F A S T
SAD
Clock division
CCR4 CCR3 CCR2 C C R 1 C C R 0
A L S
ES0
B C 2 BC1 B C 0
B i t c o u n t e r
Table 10 Multi-master I
SCL clock frequency
System clock
Communication mode
S y s t e m c l o c k ( )
b0
b0
b 0
b0
Format
Item
I n t e r n a l d a t a b u s
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
M S T T R X B B PIN
b7
S1
= f(X
= f(X
b 7
S3
S P C F L
SPCF
S 3 D
b7
MITSUBISHI MICROCOMPUTERS
I
IN
IN
2
C s p e c i a l m o d e s t a t u s r e g i s t e r
PIN2
HD
I
)/2 (high-speed mode)
)/8 (middle-speed mode)
2
Interrupt
generating
circuit
2
In conformity with Philips I
standard:
In conformity with Philips I
standard:
16.1 kHz to 400 kHz (at = 4 MHz)
C s p e c i a l m o d e c o n t r o l r e g i s t e r
C-BUS interface functions
10-bit addressing format
7-bit addressing format
High-speed clock mode
Standard clock mode
Master transmission
Master reception
Slave transmission
Slave reception
P I N 2
PIN2
IN
2
C Patent Rights to use these components
AL AAS AD0 LRB
3803/3804 Group
I
2
C s t a t u s r e g i s t e r
Interrupt request signal
(I
2
A A S 2 A A S 1 A A S 0
H S L A D ACKI
CIRQ)
Function
b0
CON
b 0
b 0
2
2
C-BUS
C-BUS