m38039mf-xxxsp Mitsumi Electronics, Corp., m38039mf-xxxsp Datasheet - Page 61

• Manufacturer Part Number: m38039mf-xxxsp
• Description: Single-chip 8-bit Cmos Microcomputer
• Manufacturer: Mitsumi Electronics, Corp.

Fig. 52 Structure of serial I/O3 control registers
b7
b 7
b 0
b0
( S I O 3 S T S : a d d r e s s 0 0 3 1
S e r i a l I / O 3 s t a t u s r e g i s t e r
(UART3CON : address 0033
U A R T 3 c o n t r o l r e g i s t e r
T r a n s m i t b u f f e r e m p t y f l a g ( T B E )
0 : B u f f e r f u l l
1 : B u f f e r e m p t y
R e c e i v e b u f f e r f u l l f l a g ( R B F )
0 : B u f f e r e m p t y
1 : B u f f e r f u l l
T r a n s m i t s h i f t c o m p l e t i o n f l a g ( T S C )
0 : T r a n s m i t s h i f t i n p r o g r e s s
1 : T r a n s m i t s h i f t c o m p l e t e d
O v e r r u n e r r o r f l a g ( O E )
0 : N o e r r o r
1 : O v e r r u n e r r o r
P a r i t y e r r o r f l a g ( P E )
0 : N o e r r o r
1 : P a r i t y e r r o r
F r a m i n g e r r o r f l a g ( F E )
0 : N o e r r o r
1 : F r a m i n g e r r o r
S u m m i n g e r r o r f l a g ( S E )
0 : ( O E ) U ( P E ) U ( F E ) = 0
1 : ( O E ) U ( P E ) U ( F E ) = 1
N o t u s e d ( r e t u r n s “ 1 ” w h e n r e a d )
Character length selection bit (CHAS)
0: 8 bits
1: 7 bits
Parity enable bit (PARE)
0: Parity checking disabled
1: Parity checking enabled
Parity selection bit (PARS)
0: Even parity
1: Odd parity
Stop bit length selection bit (STPS)
0: 1 stop bit
1: 2 stop bits
P3
0: CMOS output (in output mode)
1: N-channel open drain output (in output mode)
Not used (return “1” when read)
5
/T
X
D
3
P-channel output disable bit (POFF)
1 6
)
16
)
b 7
b 0
Serial I/O3 control register
(SIO3CON : address 0032
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
BRG count source selection bit (CSS)
0: f(X
1: f(X
Serial I/O3 synchronous clock selection bit (SCS)
0: BRG output divided by 4 when clock synchronous
1: External clock input when clock synchronous serial
S
0: P3
1: P3
Transmit interrupt source selection bit (TIC)
0: Interrupt when transmit buffer has emptied
1: Interrupt when transmit shift operation is completed
Transmit enable bit (TE)
0: Transmit disabled
1: Transmit enabled
Receive enable bit (RE)
0: Receive disabled
1: Receive enabled
Serial I/O3 mode selection bit (SIOM)
0: Clock asynchronous (UART) serial I/O
1: Clock synchronous serial I/O
Serial I/O3 enable bit (SIOE)
0: Serial I/O disabled
1: Serial I/O enabled
RDY3
(pins P3
(pins P3
serial I/O is selected, BRG output divided by 16
when UART is selected.
I/O is selected, external clock input divided by 16
when UART is selected.
IN
IN
7
7
output enable bit (SRDY)
pin operates as normal I/O pin
pin operates as S
) (f(X
)/4 (f(X
4
4
MITSUBISHI MICROCOMPUTERS
to P3
to P3
CIN
CIN
) in low-speed mode)
7
7
)/4 in low-speed mode)
operate as normal I/O pins)
operate as serial I/O pins)
3803/3804 Group
16
RDY3
)
output pin
61