tc90a58f TOSHIBA Semiconductor CORPORATION, tc90a58f Datasheet - Page 21

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tc90a58f

Manufacturer Part Number
tc90a58f
Description
3-channel Ad Converter
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
Sub-Address 0DH
Sub-Address 0EH
Sub-Address 0FH
Sub-Address 10H
·
·
·
·
·
·
·
Default
Default
Default
Default
Name
Name
Name
Name
CLPSTA3~CLPSTA0: Sets the starting point of the clamp pulse generated internally in Clamp Pulse
CLPWID10~CLPWID7: Sets the width of the clamp pulse generated internally in Clamp Pulse
CLPWID6~CLPWID0: Sets the width of the clamp pulse generated internally in Clamp Pulse
CLPSEL: Selects the externally input clamp pulse or internally generated clamp pulse.
VGTEDA9~VGTEDA5: Sets stop point 1 of VD-noise-rejected gate pulse.
VGTEDA4~VGTEDA0: Sets stop point 1 of VD-noise-rejected gate pulse.
VGTEDB9~VGTEDB7: Sets stop point 2 of VD-noise-rejected gate pulse.
Bit
Bit
Bit
Bit
0 (default): Externally input clamp pulse
VGTEDA4
CLPSTA3
CLPWID6
7 (MSB)
7 (MSB)
7 (MSB)
7 (MSB)
¾
¾
0
1
0
VGTEDA3
CLPSTA2
CLPWID5
Internal Generation Mode (i.e. when CLPSEL = 1 in Sub-Address 0EH).
This setting works in combination with the setting of CLPSTA10~CLPSTA4 in
Sub-Address 06H.
Internal Generation Mode (i.e. when CLPSEL = 1 in Sub-Address 0EH).
This setting works in combination with the setting of CLPWID10~CLPWID7
in Sub-Address 0DH.
Enabled only when VGATEON in Sub-Address 11H = 1
This setting works in combination with the setting of VGTEDA4~VGTEDA0 in
Sub-Address 10H.
VGATEON = Enabled only when VGATEON in Sub-Address 11H = 1.
This setting works in combination with the setting of VGTEDA9~VGTEDA5 in
Sub-Address 0FH.
Enabled only when VGATEON in Sub-Address 11H = 1.
This setting works in combination with the setting of VGTEDB6~VGTEDB0 in
Sub-Address 11H.
Internal Generation Mode (i.e. when CLPSEL = 1 in Sub-Address 0EH).
This setting works in combination with the setting of CLPWID6~CLPWID0 in
Sub-Address 0EH.
¾
¾
6
0
6
1
6
6
0
VGTEDA2
CLPSTA1
CLPWID4
¾
¾
5
0
5
0
5
5
0
21
VGTEDA9
VGTEDA1
CLPSTA0
CLPWID3
4
0
4
0
4
0
4
0
1: Internally generated clamp pulse
CLPWID10
VGTEDA8
VGTEDA0
CLPWID2
3
0
3
0
3
0
3
0
VGTEDA7
VGTEDB9
CLPWID9
CLPWID1
2
0
2
0
2
0
2
0
VGTEDA6
VGTEDB8
CLPWID8
CLPWID0
1
0
1
0
1
0
1
0
TC90A58F
2002-02-06
VGTEDA5
VGTEDB7
CLPWID7
CLPSEL
0 (LSB)
0 (LSB)
0 (LSB)
0 (LSB)
0
0
0
0

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