tc90a58f TOSHIBA Semiconductor CORPORATION, tc90a58f Datasheet - Page 23

• Manufacturer Part Number: tc90a58f
• Description: 3-channel Ad Converter
• Manufacturer: TOSHIBA Semiconductor CORPORATION

Sub-Address 14H
·
·
·
Default
Name
DIVIIC3~DIVIIC0: Switches the HPLL oscillation frequency. Enabled when CKSEL[3:0] (pins 72 to
For Note5 and Note6, the clocks are generated by dividing the main clock by 29.8 MHz and 27 MHz
respectively.
DIVHDSEL: When using an internal HPLL, selects whether to use HDIN or the HPLL reference
HRESVAR: Selects whether reset values for built-in H-counters are to be set internally or externally
Bit
DIVIIC3
0 (default): Uses the HPLL reference signal (internally generated) as HD in the logic block.
1: Uses HDIN as HD in the logic block.
0 (default): The reset values are set internally.
1: The reset values can be set externally.
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
7 (MSB)
DIVIIC3
DIVIIC2
signal (generated internally) as HD in the logic block.
0
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
75) are all set to 0.
CKSEL[3:0] (pins 72 to 75) is enabled when DIVIIC3~DIVIIC0 is set to all 0s.
DIVIIC2
DIVIIC1
6
0
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
DIVIIC1
DIVIIC0
5
0
0
1
0
1
0
1
0
1
1
0
0
1
0
1
1
0
23
Clock Frequency
DIVIIC0
29.8 MHz
29.7 MHz
29.7 MHz
29.8 MHz
14.9 MHz
13.5 MHz
4
0
27 MHz
27 MHz
¾
¾
¾
¾
¾
¾
¾
¾
DIVHDSEL
3
0
15.7 kHz, general-purpose
Horizontal Frequency
External clock input
HRESVAR
33.7 kHz, 1080I
31.5 kHz, 480P
45.0 kHz, 720P
15.7 kHz, 480I
31.5 kHz
15.7 kHz
15.7 kHz
2
0
¾
¾
¾
¾
¾
¾
¾
(Note5)
(Note6)
¾
¾
1
TC90A58F
2002-02-06
0 (LSB)
¾
¾