xr16l2751im Exar Corporation, xr16l2751im Datasheet - Page 19

• Manufacturer Part Number: xr16l2751im
• Description: 2.25v To 5.5v Duart With 64-byte Fifo And Powersave
• Manufacturer: Exar Corporation

xr
REV. 1.2.2
The auto RS485 half-duplex direction control changes the behavior of the transmitter when enabled by FCTR
bit-3. By default, it de-asserts RTS# (HIGH) output following the last stop bit of the last character that has been
transmitted. This helps in turning around the transceiver to receive the remote station’s response. When the
host is ready to transmit next polling data packet again, it only has to load data bytes to the transmit FIFO. The
transmitter automatically re-asserts RTS# (LOW) output prior to sending the data. The RS485 half-duplex
direction control output can be inverted by enabling EMSR bit-3.
The 2751 UART includes the infrared encoder and decoder compatible to the IrDA (Infrared Data Association)
version 1.0. The IrDA 1.0 standard that stipulates the infrared encoder sends out a 3/16 of a bit wide HIGH-
pulse for each “0” bit in the transmit data stream. This signal encoding reduces the on-time of the infrared LED,
hence reduces the power consumption. See
The infrared encoder and decoder are enabled by setting MCR register bit-6 to a ‘1’. When the infrared feature
is enabled, the transmit data output, TX, idles at logic zero level. Likewise, the RX input assumes an idle level
of logic zero from a reset and power up, see
Typically, the wireless infrared decoder receives the input pulse from the infrared sensing diode on the RX pin.
Each time it senses a light pulse, it returns a logic 1 to the data bit stream. However, this is not true with some
infrared modules on the market which indicate a logic 0 by a light pulse. So the 2751 has a provision to invert
the input polarity to accommodate this. In this case user can enable FCTR bit-2 to invert the input signal.
2.18
2.19
Auto RS485 Half-duplex Control
Infrared Mode
F
IGURE
Receive
IR Pulse
(RX pin)
RX Data
TX Data
Transmit
(TX Pin)
IR Pulse
12. I
NFRARED
0
Bit Time
Bit Time
0
1
1/16 Clock Delay
T
2.25V TO 5.5V DUART WITH 64-BYTE FIFO AND POWERSAVE
RANSMIT
1
0
Figure 12
Figure
0
1
Character
Data Bits
D
1
12.
ATA
0
19
Data Bits
3/16 Bit Time
Character
below.
0
E
0
NCODING AND
0
1
1 1
1
0
R
0
ECEIVE
1/2 Bit Time
1
1
IRdecoder-
IrEncoder-1
D
ATA
D
ECODING
XR16L2751