xr16l2751im Exar Corporation, xr16l2751im Datasheet - Page 52

• Manufacturer Part Number: xr16l2751im
• Description: 2.25v To 5.5v Duart With 64-byte Fifo And Powersave
• Manufacturer: Exar Corporation

XR16L2751
2.25V TO 5.5V DUART WITH 64-BYTE FIFO AND POWERSAVE
4.0 INTERNAL Register descriptions ........................................................................................ 24
ABSOLUTE MAXIMUM RATINGS...................................................................................40
ELECTRICAL CHARACTERISTICS ................................................................................40
TYPICAL PACKAGE THERMAL RESISTANCE DATA (MARGIN OF ERROR: ± 15%) 40
where applicable41
PACKAGE DIMENSIONS (48 PIN TQFP - 7 X 7 X 1 MM)...............................................49
TABLE OF CONTENTS ................................................................................................................................. I
T
T
T
T
T
T
T
T
F
F
F
F
F
F
F
F
F
F
F
F
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
4.1 R
4.2 T
4.3 I
4.4 I
4.5 FIFO C
4.6 L
4.7 M
4.8 L
4.9 M
4.10 S
4.11 E
4.12 FIFO L
4.13 B
4.14 D
4.15 D
4.16 T
4.17 FIFO D
4.18 F
4.19 E
4.20 S
DC E
AC E
R
EVISION
10: I
11: T
12: P
13: S
14: A
15: T
16: S
17: UART RESET CONDITIONS FOR CHANNEL A AND B ................................................................................................... 39
4.3.1 IER versus Receive FIFO Interrupt Mode Operation................................................................................ 24
4.3.2 IER versus Receive/Transmit FIFO Polled Mode Operation .................................................................... 25
4.4.1 Interrupt Generation: ................................................................................................................................ 26
4.4.2 Interrupt Clearing:..................................................................................................................................... 26
Unless otherwise noted: TA=0o to 70oC (-40o to +85oC for industrial grade package), Vcc=2.25 - 5.5V, 70 pF load
NTERRUPT
NTERRUPT
14. C
15. M
16. 16 M
17. 16 M
18. 68 M
20. R
19. 68 M
21. T
22. R
23. R
24. T
25. T
INE
INE
RANSMIT
LECTRICAL
ECEIVE
LECTRICAL
ODEM
ODEM
RIGGER
CRATCHPAD
NHANCED
AUD
OFTWARE
EVICE
EVICE
EATURE
NTERRUPT
NHANCED
RANSMIT AND
RIGGER
ARITY SELECTION
CRATCHPAD
UTO
OFTWARE
C
S
RANSMIT
RANSMIT
RANSMIT
LOCK
ECEIVE
ECEIVE
ECEIVE
ODEM
H
TATUS
ONTROL
R
ONTROL
ISTORY
RTS H
ODE
ODE
ODE
ODE
C
S
EVEL
ATA
ATE
H
I
R
TATUS
ONTROL
DENTIFICATION
T
H
I
T
L
OLDING
EVISION
IMING
NPUT
R
R
R
E
S
C
ABLE
(I
(I
(M
(M
EVEL
OLDING
S
F
R
R
R
C
C
EADY
EADY
EADY
M
F
NABLE
TATUS
NTEL
NTEL
C
ONTROL
OURCE AND
R
G
F
LOW
YSTERESIS
EADY
EADY
EADY
S
R
OTOROLA
OTOROLA
HARACTERISTICS
LOW
HARACTERISTICS
ODE
OUNT
EATURE
R
EGISTER
/O
....................................................................................................................................50
R
R
WAP
ENERATOR
.................................................................................................................................................................... 42
EGISTER
S
R
ECEIVE
R
EGISTER
EGISTER
) D
) D
UTPUT
ELECT
C
& I
& I
& I
(TRG) - W
................................................................................................................................................................ 30
EGISTER
R
EGISTER
& I
& I
& I
R
ONTROL
R
C
S
ATA
ATA
S
NTERRUPT
NTERRUPT
NTERRUPT
R
R
R
EGISTER
EGISTER
ELECTION
NTERRUPT
NTERRUPT
NTERRUPT
EGISTER
R
ONTROL
ELECT
) D
) D
EGISTER
EGISTER
EGISTER
R
FIFO T
....................................................................................................................................................... 35
....................................................................................................................................................... 36
EGISTER
T
B
B
P
R
EGISTER
IMING
ATA
ATA
(LSR) - R
US
US
RIORITY
(FLVL) - R
EGISTER
R
F
(SPR) - R
(LCR) - R
R
(FCR) - W
EGISTER
UNCTIONS
R
W
(MSR) - R
B
B
R
EGISTERS
EAD
............................................................................................................................................ 34
RITE
T
T
T
RIGGER
RITE
US
US
F
(MCR)
(RHR) - R
T
T
T
EGISTER
R
IMING
IMING
IMING
(DREV) - R
OR
(IER) - R
(ISR) - R
IMING
IMING
IMING
(THR) - W
............................................................................................................41
L
EGISTERS
R
W
...........................................................................................................40
(FC) - R
T
EVEL
(FCTR) - R
T
C
EAD
-O
IMING
RITE
IMING
(EFR) ........................................................................................... 37
EAD
HANNELS
[N
[FIFO M
[FIFO M
T
............................................................................................................................... 37
NLY
[N
[FIFO M
[FIFO M
EAD
(DVID) - R
EAD
EAD
............................................................................................................................. 27
ABLE AND
ON
T
OR
T
ON
RITE
IMING
EAD
.......................................................................................................................... 43
......................................................................................................................... 44
IMING
(DLL
O
(EMSR) ................................................................................. 34
-FIFO M
-O
-FIFO M
EAD
EAD
/W
EAD
/W
............................................................................................. 36
EAD
G
NLY
(XOFF1, XOFF2, XON1, XON2) - R
ODE
ODE
RITE
A & B......................................................................................................... 43
-O
EAD
ENERAL
.................................................................................................................. 44
NLY
O
ODE
ODE
RITE
RITE
................................................................................................................ 45
- O
/W
-O
AND
-O
EAD
L
NLY
NLY
, DMA D
, DMA E
..................................................................................... 32
EVEL
ODE
, DMA M
, DMA M
-O
NLY
O
................................................................................... 35
RITE
EAD
NLY
ODE
NLY
................................................................................. 29
................................................................................. 34
/W
NLY
NLY
II
DLM) - R
]
............................................................................... 27
............................................................................... 33
S
FOR
]
P
ELECTION
RITE
FOR
............................................................................ 26
............................................................................ 36
O
ISABLED
NABLED
........................................................................... 24
........................................................................... 24
URPOSE
ODE
ODE
......................................................................... 24
NLY
......................................................................... 36
C
C
HANNELS
HANNELS
.................................................................... 36
D
E
.................................................................. 35
]
]
ISABLED
NABLED
EAD
.................................................................................. 29
FOR
FOR
O
UTPUTS
/W
C
A & B ................................................................. 45
C
A & B ............................................................... 46
HANNELS
]
HANNELS
]
RITE
FOR
FOR
C
C
............................................... 35
HANNELS
C
HANNELS
A & B ................................................ 47
A & B ............................................... 46
ONTROL
A & B.................................... 48
A & B ................................... 47
EAD
- R
/W
EAD
RITE
/W
xr
RITE
............... 38
........ 31
REV. 1.2.2