sc16c852 NXP Semiconductors, sc16c852 Datasheet - Page 7

• Manufacturer Part Number: sc16c852
• Description: 2.5 V To 3.3 V Dual Uart, 5 Mbit/s Max. With 128-byte Fifos, Infrared Irda And 16 Mode Or 68 Mode Bus Interface
• Manufacturer: NXP Semiconductors

NXP Semiconductors
Table 2.
SC16C852_1
Product data sheet
Symbol
A0
A1
A2
CDA
CDB
CSA/CS
CSB/A3
CTSA
CTSB
DSRA
DSRB
DTRA
DTRB
D0
D1
D2
D3
D4
D5
D6
D7
INTA/IRQ
Pin description
Pin
LQFP48
28
27
26
40
16
10
11
38
23
39
20
34
35
44
45
46
47
48
1
2
3
30
5.2 Pin description
HVQFN32
20
19
18
-
-
7
8
25
16
-
-
-
-
27
28
29
30
31
32
1
2
22
Type
I
I
I
I
I
I
I
I
I
I
O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
Description
Address 0 select bit. Internal register address selection.
Address 1 select bit. Internal register address selection.
Address 2 select bit. Internal register address selection.
Carrier Detect (active LOW). These inputs are associated with individual
UART channels A through B. A logic 0 on this pin indicates that a carrier has
been detected by the modem for that channel.
When 16/68 pin is at logic 1 (or unconnected), this input is chip select for
channel A.
When 16/68 pin is at logic 0, this input becomes the chip select for both
channels (Motorola mode).
When 16/68 pin is at logic 1 (or unconnected), this input is chip select for
channel B.
When 16/68 pin is at logic 0, this input becomes the address line A3 which is
used for channel selection; a logic 0 selects channel A and a logic 1 selects
channel B.
Clear to Send (active LOW). These inputs are associated with individual
UART channels, A through B. A logic 0 on the CTSx pin indicates the modem or
data set is ready to accept transmit data from the SC16C852. Status can be
tested by reading MSR[4].
Data Set Ready (active LOW). These inputs are associated with individual
UART channels, A through B. A logic 0 on this pin indicates the modem or data
set is powered-on and is ready for data exchange with the UART. Status can be
tested by reading MSR[5].
Data Terminal Ready (active LOW). These outputs are associated with
individual UART channels, A through B. A logic 0 on this pin indicates that the
SC16C852 is powered-on and ready. This pin can be controlled via the modem
control register. Writing a logic 1 to MCR[0] will set the DTR output to logic 0,
enabling the modem. This pin will be a logic 1 after writing a logic 0 to MCR[0],
or after a reset.
Data bus (bidirectional). These pins are the 8-bit, 3-state data bus for
transferring information to or from the controlling CPU. D0 is the least
significant bit and the first data bit in a transmit or receive serial data stream.
When 16/68 pin is at logic 1 or unconnected, this output becomes channel A
interrupt output. The output state is defined by the user through the software
setting of MCR[3]. INTA is set to the active mode and OP2A output to a logic 0
when MCR[3] is set to a logic 1. INTA is set to the 3-state mode and OP2A is
set to a logic 1 when MCR[3] is set to a logic 0.
When 16/68 pin is at logic 0, this output becomes device interrupt output
(active LOW, open-drain). An external pull-up resistor to V
Rev. 01 — 31 August 2009
Dual UART with 128-byte FIFOs and IrDA encoder/decoder
SC16C852
DD
© NXP B.V. 2009. All rights reserved.
is required.
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