a3pn010 Actel Corporation, a3pn010 Datasheet - Page 76

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a3pn010

Manufacturer Part Number
a3pn010
Description
Proasic 3 Nano Flash Fpgas
Manufacturer
Actel Corporation
Datasheet

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Radiation-Tolerant ProASIC3 FPGAs
Table 2-111 • Parameter Definition and Measuring Nodes
2 -6 4
Parameter Name
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
*
OCLKQ
OSUD
OHD
OSUE
OHE
OCLR2Q
OREMCLR
ORECCLR
OECLKQ
OESUD
OEHD
OESUE
OEHE
OECLR2Q
OEREMCLR
OERECCLR
ICLKQ
ISUD
IHD
ISUE
IHE
ICLR2Q
IREMCLR
IRECCLR
See
Figure 2-28 on page 2-63
Clock-to-Q of the Output Data Register
Data Setup Time for the Output Data Register
Data Hold Time for the Output Data Register
Enable Setup Time for the Output Data Register
Enable Hold Time for the Output Data Register
Asynchronous Clear-to-Q of the Output Data Register
Asynchronous Clear Removal Time for the Output Data Register
Asynchronous Clear Recovery Time for the Output Data Register
Clock-to-Q of the Output Enable Register
Data Setup Time for the Output Enable Register
Data Hold Time for the Output Enable Register
Enable Setup Time for the Output Enable Register
Enable Hold Time for the Output Enable Register
Asynchronous Clear-to-Q of the Output Enable Register
Asynchronous Clear Removal Time for the Output Enable Register
Asynchronous Clear Recovery Time for the Output Enable Register
Clock-to-Q of the Input Data Register
Data Setup Time for the Input Data Register
Data Hold Time for the Input Data Register
Enable Setup Time for the Input Data Register
Enable Hold Time for the Input Data Register
Asynchronous Clear-to-Q of the Input Data Register
Asynchronous Clear Removal Time for the Input Data Register
Asynchronous Clear Recovery Time for the Input Data Register
for more information.
Parameter Definition
A d v a n c e v 0. 1
Measuring Nodes
(from, to)*
HH, DOUT
HH, EOUT
LL, DOUT
II, EOUT
GG, HH
GG, HH
DD, AA
DD, AA
KK, HH
KK, HH
CC, AA
CC, AA
BB, AA
AA, EE
BB, AA
DD, EE
LL, HH
LL, HH
FF, HH
FF, HH
JJ, HH
JJ, HH
II, HH
II, HH

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