hsp50214a Intersil Corporation, hsp50214a Datasheet - Page 24

• Manufacturer Part Number: hsp50214a
• Description: Programmable Downconverter
• Manufacturer: Intersil Corporation

The prototype polyphase filter has 192 taps designed at 32
times the input sample rate. Each of the 32 phases has 6 fil-
ter taps (6)(32) = 192. The stopband attenuation of the pro-
totype filter is greater than 60dB, as shown in Figure 24. The
signal to total image power ratio is approximately 55dB, due
to the aliasing of the interpolation images. The filter is capa-
ble of decimation factors from 1 to 4. If the output is at least
2x the baud rate, the 32 interpolation phases yield an effec-
tive sample rate of 64x the baud rate or approximately 1.5%,
(1/64), maximum timing error.
Following the Re-sampler are two interpolation halfband fil-
ters. The halfband filters allow the user to up-sample by 2 or
4 to recover time resolution lost by decimating. Interpolating
by 2 or 4 gives 1/4 or 1/8 baud time resolution (assuming 2x
baud at the re-sampler output). The halfband filters use the
same coefficients as HB3 and HB5 from the Halfband Filters
Section. If one halfband is used, the 23-tap filter is chosen. If
two are used, the 23-tap filter runs first followed by the
15-tap filter operating at twice the first halfband’s rate. The
23-tap filter requires 7 multiplies, and the 15-tap filter
requires 5 multiplies to complete a filter calculation.
Using the interpolation halfband filters allows for reduction in
the FIR filter sample rate. This optimizes the use of the pro-
grammable FIR filter by allowing the FIR output sample rate
to be closer to the Nyquist rate of the desired bandwidth.
FIGURE 24A. POLYPHASE RESAMPLER FILTER BROADBAND
-100
-120
-20
-40
-60
-80
0
1
2
FREQUENCY RESPONSE
3
FREQUENCY (RELATIVE TO f
4
5
6
7
8
9 10 11 12 13 14 15 16
IN
)
HSP50214A
24
Optimizing the FIR filter performance provides better use of
the programmable FIR taps. Table 10 details the maximum
clocking rates for the possible resampling and interpolation
halfband filter configurations of this section of the PDC. Con-
trol Word 16, Bits 2-0 identify the filter configuration. Control
Word 16, Bit 3 is used to bypass the polyphase re-sampler
filter.
For proper data output from the interpolation filters, the data
ready signal must account for the interpolation process. Fig-
ure 25 illustrates the insertion of additional data ready
pulses to provide sufficient pulses for the new output sample
rate. The Re-sampler Output Pulse Delay parameter is set in
Control Word 16, Bits 4-11. These bits set the delay between
the output samples when interpolation is utilized. Program
this distance between pulses using
A value of at least 5 is required to have sufficient time to
update the Output Buffer Register. (Writing 5 samples
requires 5 clock cycles) A value of at least 16 is required for
proper serial output from the part. (Conversion from 16-bit
parallel to serial). The value is programmed in numbers of
PROCCLK’s.
FIGURE 24B. POLYPHASE RESAMPLER FILTER PASS BAND
N
=
-10
-20
-30
-40
-50
-60
-70
-80
10
0
0
f
PROCCLK
FREQUENCY RESPONSE
/f
OUT
FREQUENCY (RELATIVE TO f
–
1
IN
)
(EQ. 20)