ak4665a AKM Semiconductor, Inc., ak4665a Datasheet - Page 21

• Manufacturer Part Number: ak4665a
• Description: 20-bit Stereo Codec With Mic/hp-amp
• Manufacturer: AKM Semiconductor, Inc.

ASAHI KASEI
3. Example for ALC1 Operation
Table 15 shows the examples of the ALC1 setting.
The following registers should not be changed during the ALC1 operation. These bits should be changed after the ALC1
operation is finished by ALC1 bit = “0” or PMADC bit = “0”.
MS0440-E-01
Register Name Comment
LMTH
ZELMN
ZTM1-0
WTM1-0
REF7-0
IVOL7-0
LMAT1-0
RGAIN1-0
ALC1
- LMTH, LMAT1-0, WTM1-0, ZTM1-0, RGAIN1-0, REF7-0, ZELMN
WR (LMAT1-0, RGAIN1-0, ZELMN, LMTH1-0; ALC1= “1”)
Limiter detection Level
Limiter zero crossing detection
Zero crossing timeout period
Recovery waiting period
*WTM1-0 bits should be the same data
Maximum gain at recovery operation
Gain of IVOL
Limiter ATT step
Recovery GAIN step
ALC1 enable
WR (ZTM1-0, WTM1-0)
as ZTM1-0 bits
Note : WR : Write
ALC1 Operation
WR (IVOL7-0)
WR (REF7-0)
Manual Mode
Figure 13. Registers set-up sequence at ALC1 operation
Table 15. Example for the ALC1 setting
* The value of IVOL should be
the same or smaller than REF’s
- 21 -
Data
E1H
91H
00
00
00
00
00
0
1
−4.1dBFS
0.375dB
0.375dB
Enable
Enable
16kHz
32kHz
+30dB
Example:
8kHz
8ms
8ms
0dB
Limiter = Zero crossing Enable
Recovery Cycle = 8ms@8kHz
Limiter and Recovery Step = 1
Maximum Gain = +30.0dB
Limiter Detection Level = −4.1dBFS
ALC1 bit = “1”
(1) Addr=05H, Data=91H
(3) Addr=04H, Data=E1H
(2) Addr=02H, Data=00H
(4) Addr=03H, Data=20H
11.025kHz
−4.1dBFS
22.05kHz
44.1kHz
0.375dB
0.375dB
Enable
+30dB
Enable
8.7ms
8.7ms
0dB
fs
−4.1dBFS
0.375dB
0.375dB
Enable
Enable
12kHz
24kHz
48kHz
+30dB
[AK4665A]
8ms
8ms
0dB
2006/05