ak4665a AKM Semiconductor, Inc., ak4665a Datasheet - Page 39

• Manufacturer Part Number: ak4665a
• Description: 20-bit Stereo Codec With Mic/hp-amp
• Manufacturer: AKM Semiconductor, Inc.

ASAHI KASEI
5) LIN/RIN/MIN → HP-Amp
(1) PDN pin should be set to “H” at least 150ns after the power is supplied.
(2) FS3-0, DFS, PUT1-0 and PTS1-0 bits should be set after PDN pin goes to “H”.
(3) PMVCM bit should be changed to “1” after FS3-0, DFS, PUT1-0 and PTS1-0 bits are set.
(4) LINHL, MINHL, RINHR and MINHR bits should be changed to “1” after PMVCM bit is changed to “1”. Each path
(5) External clocks (MCLK, BICK and LRCK) are needed to operate the charge pump circuit and HP-Amp. External
(6) PMCP, PMHPL and PMHPR bits should be changed to “1” after LINHL, MINHL, RINHR and MINHR bits are
(7) When PMHPL, PMHPR or PMLO bit is changed to “1”, LIN, RIN and MIN pins are biased to VCOM voltage.
(8) After power-up the charge pump circuit, HP-Amp is powered-up. Rising time of HP-Amp is determined by
(9) HPMTN bit should be changed to “1” to release the mute after HP-Amp is powered-up. The transition time of mute
(10) HPMTN bit should be changed to “0” to mute HP-Amp.
(11) After the transition time for mute, PMHPL and PMHPR bits should be changed to “0” to power-down of HP-Amp.
(12) After power-down of the HP-Amp, PMCP bit should be changed to “0” to power-down of the charge pump circuit.
(13) Clocks should be stopped after PMCP bit is changed to “0”.
MS0440-E-01
is switched-on during the transition time set by FS3-0 and PTS1-0 bits.
clocks are also needed for each path (DACHL, LINHL, MINHL, DACHR, RINHR, MINHR and HPMTN bits)
setting.
changed to “1”. When PMCP bit is changed to “1”, the charge pump circuit is powered-up and NVSS pin goes to
Rising time constant is determined by capacitor for AC coupling and input resistance 200kΩ (typ). In case of
0.047µF input capacitor, time constant is
FS3-0,DFS and PUT1-0 bits.
release is determined by FS3-0,DFS and PTS1-0 bits.
Falling time constant is determined by external capacitor connected with NVSS pin and internal resistance (typ
17.5kΩ). In case of 2.2µF capacitor, time constant is
−HVDD voltage according to the setting of FS3-0 and DFS bits.
PMCP bit
Power Supply
PDN pin
FS3-0, DFS bits
PUT1-0 bits
PTS1-0 bits
PMVCM bit
LINHL, MINHL,
RINHR, MINHR bits
Clock Input
NVSS pin
LIN/RIN/MIN pins
PMHPL/R bits
HPMTN bit
HP-Amp State
HPL/R pins
Figure 25. Power-up/down Sequence of LIN/RIN/MIN and HP-Amp
(1)
>150ns
00, 00
0H, 0
Don’t care
(2) >0
(Hi-Z)
PD
0V
(3) >0
τ = 0.047µF x 200kΩ = 9.4ms (typ)
τ = 2.2µF x 17.5kΩ = 38.5ms (typ)
(4) >0
(7)
(5)
(6) >0
(8)
MT
(9)
XX, XX
XH, X
- 39 -
Normal Operation
−HVDD
(10)
(11) (12)
MT
(13)
Don’t care
(Hi-Z)
PD
0V
00, 00
0H, 0
[AK4665A]
2006/05