ak4665a AKM Semiconductor, Inc., ak4665a Datasheet - Page 32

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ak4665a

Manufacturer Part Number
ak4665a
Description
20-bit Stereo Codec With Mic/hp-amp
Manufacturer
AKM Semiconductor, Inc.
Datasheet

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ASAHI KASEI
Power supply voltage for headphone amplifiers is applied from HVDD pin for the positive supply and the negative supply
generated by the internal charge pump circuit. The headphone amplifier is single-ended outputs and centered on 0V
(AVSS). Therefore, the capacitor for AC-coupling can be removed. The minimum load resistance is 16Ω. HPG bit set the
output voltage (Table 33).
The headphone output is enabled when HPMTN bit is “1” and muted when HPMTN bit is “0”. The mute ON/OFF time
are set by PTS1-0 bits (Table 39) when MOFF8 bit is “0”. When MOFF8 bit is “1”, the ON/OFF is done immediately.
When PMHPL and PMHPR bits are “0”, the headphone amplifiers are powered-down completely. At that time, the HPL
and HPR pins are AVSS voltage. The power-up/down time are set by PUT1-0 bits (Table 38) when MOFF0 bit is “0”.
When MOFF0 bit is “1”, the power up/down is done immediately.
The ON/OFF of each path is set by DACHL, LINHL, MINHL, DACHR, RINHR and MINHR bits. The summation gain
(L+R)/2 signal of DAC is output from HPL and HPR pins when HPM bit is “1”.
MS0440-E-01
of each path is 0dB (typ) at HPG bit = “0” and +5.5dB (typ) at HPG bit = “1”.
Headphone Output (HPL/HPR pins)
LIN/RIN pin
MIN pin
PMHPL/R bits
HPG bit
DACL/DACR
0
1
0
1
DACHL
DACHR
Figure 20. The Summation Circuit of Headphone Output
0
1
0
1
Table 33. Headphone Output Voltage / Power
Table 36. Headphone Output Mode (Rch)
Table 35. Headphone Output Mode (Lch)
Table 34. Headphone output states
2.0Vpp@−3dBFS
1.5Vpp@0dBFS
Output Voltage
HPMTN bit
DACHL/DACHR bit
MINHL/MINHR bit
LINHL/RINHR bit
x
0
1
HPM bit
HPM bit
x
0
1
x
0
1
- 32 -
Power-up & Output
Power-up & Mute
Power-down
Path OFF
Path OFF
Output Power
HP-Amp
17mW@16Ω
31mW@16Ω
HPL pin
HPR pin
(L+R)/2
(L+R)/2
R
L
HPL/HP R pin
Default
Default
Default
Default
[AK4665A]
2006/05

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