wm8400 Wolfson Microelectronics plc, wm8400 Datasheet - Page 38
![no-image](/images/no-image-200.jpg)
wm8400
Manufacturer Part Number
wm8400
Description
Wolfson Audioplustm Hi-fi Audio Codec And Power Management Unit For Mobile Multimedia
Manufacturer
Wolfson Microelectronics plc
Datasheet
1.WM8400.pdf
(208 pages)
- Current page: 38 of 208
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WM8400
w
Figure 11 Typical Power up Sequence where DCVDD is Powered before AVDD
Figure 11 shows a typical power-up sequence where DCVDD comes up first. First it is assumed that
DCVDD is already up to specified operating voltage. When AVDD goes above the minimum
threshold, V
chip is held in reset. In this condition, all writes to the control interface are ignored. When AVDD rises
to V
interface may take place.
On power down, where DCVDD falls first, PORB is asserted low whenever DCVDD drops below the
minimum threshold V
Table 1 Typical POR Operation (simulated values)
Notes:
1.
2.
3.
Vpora_on
Vpora_off
Vpord_on
Vpord_off
SYMBOL
Vpora
pora_on
If AVDD and DCVDD suffer a brown-out (i.e. drop below the minimum recommended operating
level but do not go below V
operation when the voltage is back to the recommended level again.
The chip will enter reset at power down when AVDD or DCVDD falls below V
This may be important if the supply is turned on and off frequently by a power management
system.
The minimum t
specification is guaranteed by design rather than test.
, PORB is released high and all registers are in their default state and writes to the control
pora
, there is enough voltage for the circuit to guarantee PORB is asserted low and the
MIN
por
pord_off
period is maintained even if DCVDD and AVDD have zero rise time. This
1.65
0.92
TYP
0.6
1.5
0.9
.
pora_off
MAX
or V
UNIT
pord_off
V
V
V
V
V
) then the chip will not reset and will resume normal
PP, April 2009, Rev 3.0
pora_off
Pre-Production
or V
pord_off
38
.
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