wm8400 Wolfson Microelectronics plc, wm8400 Datasheet - Page 47

• Manufacturer Part Number: wm8400
• Description: Wolfson Audioplustm Hi-fi Audio Codec And Power Management Unit For Mobile Multimedia
• Manufacturer: Wolfson Microelectronics plc

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Pre-Production
CLASS D SWITCHING CLOCK
The Class D switching clock is derived either from SYSCLK or directly from the WM8400 internal
600kHz oscillator. The source is selected by CLASSD_CLK_SEL. When SYSCLK is used as the
Class D clock source, the clock rate is determined by register field DCLKDIV as described in Table
12. This clock should be set to between 700kHz and 800kHz for optimum performance. The class D
switching clock should not be disabled when the speaker output is active, as this will prevent the
speaker outputs from functioning. The class D switching clock frequency should not be altered while
the speaker output is active as this may generate an audible click.
Table 12 DCLK Control
TOCLK CONTROL
A slow clock (TOCLK) is derived from SYSCLK to enable input de-bouncing and volume update
timeout functions. This clock is enabled by register bit TOCLK_ENA, and its frequency is controlled
by TOCLK_RATE, as described in Table 13.
Table 13 TOCLK Control
R7 (07h)
R35 (23h)
R7 (07h)
REGISTER
REGISTER
ADDRESS
ADDRESS
8:6
7
15
14
BIT
BIT
DCLKDIV
[2:0]
CLASSD_CLK_
SEL
TOCLK_RATE
TOCLK_ENA
LABEL
LABEL
DEFAULT
DEFAULT
111b
0b
0b
0b
Class D Clock Divider
000 = SYSCLK
001 = SYSCLK / 2
010 = SYSCLK / 3
011 = SYSCLK / 4
100 = SYSCLK / 6
101 = SYSCLK / 8
110 = SYSCLK / 12
111 = SYSCLK / 16
Class D Clock Source
0 = Derived from SYSCLK
(via DCLKDIV)
1 = 600kHz oscillator
Timeout Clock Rate
(Selects clock to be used for volume
update timeout and GPIO input de-
bounce)
0 = SYSCLK / 2
1 = SYSCLK / 2
Timeout Clock Enable
(This clock is required for volume update
timeout and GPIO input de-bounce)
0 = disabled
1 = enabled
DESCRIPTION
DESCRIPTION
21
19
(Slower Response)
(Faster Response)
PP, April 2009, Rev 3.0
WM8400
47