ml87v2105 Oki Semiconductor, ml87v2105 Datasheet - Page 65

• Manufacturer Part Number: ml87v2105
• Description: Video Signal Noise Reduction Ic With A Built-in 5.6 Mbit Frame Memory
• Manufacturer: Oki Semiconductor

OKI Semiconductor
ICINV Initial value: 0; Setting range: 0 to 1
IHES Initial value: 0; Setting range: 0 to 1
POFF Initial value: 0; Setting range: 0 to 1
Sets internal input system clock (IICLK) polarity.
Sets the polarity of IICLK (ICLK frequency-divided by 2) generated in the input 8-bit mode and ITU-R
BT.656 mode.
This setting is not in synchronization with IVS.
Sets IHS edge for internal input system clock (IICLK) reset
Selects the reset timing of IICLK generated in 1H period at the fall or rise of IHS.
Sets ITU-R BT.656 mode parity check.
Table R2-2-1 (4) ITU-R BT.656 Mode Parity Check Setting
Table R2-2-1 (3) IHS Edge Setting for IICLK Reset
Table R2-2-1 (2) IICLK Polarity Setting
ICINV
POFF
IHES
0
1
0
1
0
1
IHS edge for H reset
At IHS rise reset: 1
At IHS rise reset: 0
IICLK polarity
Parity check
Rise
OFF
Fall
ON
PEDL87V2105-02
ML87V2105
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