zl50011 Zarlink Semiconductor, zl50011 Datasheet - Page 22

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zl50011

Manufacturer Part Number
zl50011
Description
Flexible 512 Channel Dx With On-chip Dpll
Manufacturer
Zarlink Semiconductor
Datasheet
2.2.3
By default, the output frame boundary is defined by the falling edge of the CKo0, CKo1 or CKo2 output clock while
the FPo0, FPo1 or FPo2 output frame pulse goes low respectively. When the output data rates are 2.048 Mbps,
4.096 Mbps and 8.192 Mbps, there are 32, 64 or 128 output channels per every ST-BUS frame respectively. Figure
14 describes the details.
CKo0 or CKo1
CKo1 or CKo2
FPo0 or FPo1
FPo1 or FPo2
Output Frame Boundary
(16.384 MHz)
(32.768 MHz)
(2.048 Mbps)
(4.096 Mbps)
(8.192 Mbps)
(4.096 MHz)
(8.192 MHz)
ST-BUS Output Timing
(8kHz)
CKo2
FPo0
FPo2
CKo
STo
STo
STo
3
1
Figure 14 - ST-BUS Output Timing for Various Output Data Rates
2
0
1 0
0
7
7
6
7
5
Channel 0
6
4
3
5
2
6
Channel 0
1 0
4
7
Zarlink Semiconductor Inc.
3
6
5
Channel 1
5
ZL50011
2
4
Channel 0
3
1
22
2
4
1 0
0
6
3
Channel 126
5
6
4
Channel 31
3
Output Frame Boundary
5
2
2
Channel 63
1 0
4
7
3
6
1
5
Channel 127
2
4
3
1
2
0
1 0
0
Data Sheet
7 6
7
7

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