am79c961 Advanced Micro Devices, am79c961 Datasheet - Page 108

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am79c961

Manufacturer Part Number
am79c961
Description
Pcnettm-isa Jumperless Single-chip Ethernet Controller For Isa
Manufacturer
Advanced Micro Devices
Datasheet

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Optional Address PROM Interface
The suggested address PROM is the Am27LS19, a
32x8 device. APCS should be connected directly to the
device’s G input.
Boot PROM Interface
The boot PROM is a 8K – 64K EPROM. Its OE pin
should be tied to ground, and chip enable CE to BPCS to
minimize power consumption at the expense of speed.
Shown below is a 27C128.
Higher density EPROMs place an address line on the
pin that is defined for lower density EPROMs as the VPP
(programming voltage) pin. For READ only operation on
an EPROM, the VPP pin can assume any logic level, as
long as the voltage on the VPP pin does not exceed the
programming voltage threshold (typically 7 V to 12 V).
Therefore, a socket with a 27512 pinout will also support
2764 and 27128 EPROM devices.
1-582
AMD
Address PROM Example
Boot PROM Example
A4–A0
G
CE
OE
A13-A0
16K x 8 EPROM
32 x 8 PROM
27LS19
27C128
Q7–Q0
DQ7-DQ0
18183B-23
18183B-24
P R E L I M I N A R Y
Am79C961
Static RAM Interface (for Shared Memory
Only)
The SRAM is an 8Kx8 or 32Kx8 device. The PCnet-ISA
controller can support 64 Kbytes of SRAM address
space. The PCnet-ISA
SRWE outputs which can go directly to the OE and WE
pins of the SRAM, respectively. The address lines are
connected as described in the shared memory section
and the data lines go to the Private Data Bus.
AUI
The PCnet-ISA
of transformers. The DI and CI inputs should each be
terminated with a pair of matched 39
tors connected in series with the middle node bypassed
to ground with a .01 F to 0.1 F capacitor. Refer to the
PCnet-ISA Technical Manual (PID #16850B) for net-
work interface design and refer to Appendix A for a list of
compatible AUI isolation transformers.
EEPROM Interface
The suggested EEPROM is the industry standard
93C56 2 Kbit serial EEPROM. This is used in the 16-bit
mode to provide 128 x 16-bit EEPROM locations to
store configuration information as well as the Plug and
Play information.
PRDB2/EEDO
PRDB0/EESK
PRDB1/EEDI
EECS
+
controller drives the AUI through a set
+
controller provides SROE and
CS
DO
DI
CLK
93C56
ORG
18183B-25
or 40.2
V
CC
resis-
+

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