am79c961 Advanced Micro Devices, am79c961 Datasheet - Page 46

• Manufacturer Part Number: am79c961
• Description: Pcnettm-isa Jumperless Single-chip Ethernet Controller For Isa
• Manufacturer: Advanced Micro Devices

AEN_CS
APROM_EN
BP_CS
1-520
FL_SEL
AMD
selection will respond as an 8-bit
port.
External Decode Logic for I/O
Registers. When written with a
one, the PCnet-ISA
AEN pin as I/O chip select bar, to
allow for external decode logic
for the upper address bit of SA
[9:5]. The purpose of this pin is to
allow I/O locations, not sup-
ported
selection, to be defined outside
the range 0x200–0x3F7. When
set to a zero, (Default), I/O Selec-
tion will use IOAM[3:0].
External Parallel IEEE Address
PROM. When set, the IRQ15 pin
is reconfigured to be an Address
Chip Select low, similar to APCS
pin in the existing PCnet-ISA
(Am79C960) device. The pur-
pose of this bit is to allow for both
a serial EEPROM and parallel
PROM
APROM_EN is set, the IEEE ad-
dress located in the serial
EEPROM will be ignored and
parallel access will occur over
the
APROM_EN is cleared, default
state, the IEEE address will be
read in from the serial device and
written to an internal RAM. When
the I/O space of the IEEE PROM
is selected, PCnet-ISA
cess the contents of this RAM for
I/O read cycles. I/O write cycles
will be ignored.
Boot PROM Chip Select. When
BP_CS is set to one, BALE will
act as an external chip select (ac-
tive low) above bit 15 of the
address bus. BALE = 0, will se-
lect the boot PROM when MEMR
is asserted low if the BP_CS bit is
set
SA[15:13]
matches
When BP_CS is set to zero.
BALE will act as the normal ad-
dress latch strobe to capture the
upper address bits for memory
access to the boot PROM.
BP_CS is by default low. The pri-
mary purpose of this bit is to allow
non-ISA bus applications to sup-
port larger Boot PROMS or
non-standard Boot PROM/Flash
locations.
Flash Memory Device Selected.
When set, the Boot PROM is re-
placed with an external Flash
and
PRDB
with
to
the
BPAM[2:0]
and
coexist.
the
selected
bus.
+
will use the
IOAM[3:0],
BPSZ[3:0]
+
P R E L I M I N A R Y
, will ac-
match
When
When
size.
Am79C961
Shared Memory Configuration Bits (Not
Defined for Bus Master Mode)
In Shared Memory Mode, the address comparison
above the 15th bit must be performed by external logic.
All address comparisons for bit 15th and below will use
the internal compare logic.
SRAM[3:0],
SR_16B, SRSZ[3:0] These are not defined in bus-
Note: In Bus Master Mode, the BP_16B is always con-
sidered an 8-bit device. If SBHE signal is left uncon-
nected, in shared memory mode (i.e. 8-bit Slot), all
memory and I/O access will assume 8-bit accesses. It is
the responsibility of external logic to drive MEMCS16
signal for the appropriate 128 Kbit segment decoded
from the LA[23:17] signals. MEMCS16 should be driven
when accessing an 8-bit memory resource.
Checksum Failure
After RESET, the PCnet-ISA
the EEPROM and storing the information in registers in-
side PCnet-ISA
a checksum on word locations 0-1Ah inclusive and if the
byte checksum = 0FFh, then the data read from the
EEPROM is considered good. If the checksum is not
equal to 0FFh, then the PCnet-ISA
what is called software relocatable mode.
In software relocatable mode, the device functions the
same as in Plug and Play mode, except that it does not
respond to the same initiation key as Plug and Play sup-
ports. Instead, a different key is used to bring
PCnet-ISA
key is as follows:
6B, 35, 9A, CD, E6, F3, 79, BC
5E, AF, 57, 2B, 15, 8A, C5, E2
F1, F8, 7C, 3E, 9F, 4F, 27, 13
09, 84, 42, A1, D0, 68, 34, 1A
+
controller out of the Wait For Key state. This
+
controller. PCnet-ISA
memory device. In Bus Master
Mode, BPCS is replaced with
Flash_OE.
Flash_WE. The Flash’s CS pin is
grounded.
mode, BPCS is replaced with
Flash_CS.
Static_RAM_CS pin. The SROE
and SRWE signals are con-
nected to both the SRAM and
Flash memory devices. FL_SEL
is cleared by a reset, which is the
default.
master mode. BP_16B must be
written with a zero in bus-master
mode.
+
controller begins reading
In shared memory
IRQ12
IRQ12
+
controller enters
+
controller does
becomes
becomes