am79c961 Advanced Micro Devices, am79c961 Datasheet - Page 99

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am79c961

Manufacturer Part Number
am79c961
Description
Pcnettm-isa Jumperless Single-chip Ethernet Controller For Isa
Manufacturer
Advanced Micro Devices
Datasheet

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12
11
10
9
8
7-0
MORE
HADR
ONE
DEF
STP
ENP
by the host, and unchanged by
the PCnet-ISA
was a reserved bit in the LANCE
(Am7990).
MORE indicates that more than
one re-try was needed to trans-
mit a frame. MORE is written by
the PCnet-ISA
bit has meaning only if the ENP
or the ERR bit is set.
ONE indicates that exactly one
re-try was needed to transmit a
frame. ONE flag is not valid when
LCOL is set. ONE is written by
the PCnet-ISA
bit has meaning only if the ENP
or the ERR bit is set.
DEFERRED indicates that the
PCnet-ISA
fer while trying to transmit a
frame. This condition occurs if
the channel is busy when the
PCnet-ISA
transmit. DEF is written by the
PCnet-ISA
has meaning only if the ENP or
ERR bits are set.
START OF PACKET indicates
that this is the first buffer to be
used by the PCnet-ISA
ler for this frame. It is used for
data chaining buffers. The STP
bit must be set in the first buffer of
the frame, or the PCnet-ISA
controller will skip over the de-
scriptor
descriptor(s) until the OWN and
STP bits are set.
STP is written by the host and is
not changed by the PCnet-ISA
controller.
END OF PACKET indicates that
this is the last buffer to be used by
the PCnet-ISA
frame. It is used for data chaining
buffers. If both STP and ENP are
set, the frame fits into one buffer
and there is no data chaining.
ENP is written by the host and is
not changed by the PCnet-ISA
controller.
The HIGH ORDER 8 address
bits of the buffer pointed to by this
descriptor. This field is written by
the host and is not changed by
the PCnet-ISA
and
+
+
+
controller is ready to
controller had to de-
controller. This bit
+
+
+
+
+
controller for this
controller.
poll
controller. This
controller. This
controller. This
the
P R E L I M I N A R Y
+
control-
next
Am79C961
+
+
+
TMD2
Bit
15-12 ONES
11-0
TMD3
Bit
15
14
BCNT
UFLO
BUFF
Name
Name
MUST BE ONES. This field is
written by the host and un-
changed by the PCnet-ISA
controller.
BUFFER BYTE COUNT is the
length of the buffer pointed to by
this descriptor, expressed as the
two’s com- plement of the length
of the buffer. This is the number
of bytes from this buffer that will
be transmitted by the PCnet-
ISA+ controller. This field is
written by the host and is not
changed by the PCnet-ISA
controller. There are no minimum
buffer size restrictions. Zero
length buffers are allowed for
protocols which require it.
BUFFER ERROR is set by the
PCnet-ISA
transmission
PCnet-ISA
find the ENP flag in the current
buffer and does not own the next
buffer. This can occur in either of
two ways:
1) The OWN bit of the next
2) FIFO underflow occurred
BUFF error will turn off the trans-
mitter (CSR0, TXON = 0). If a
Buffer Error occurs, an Under-
flow Error will also occur. BUFF is
not valid when LCOL or RTRY er-
ror is set during transmit data
chaining. BUFF is written by the
PCnet-ISA
UNDERFLOW
cates that the transmitter has
truncated a message due to data
late from memory. UFLO indi-
cates that the FIFO has emptied
before the end of the frame was
buffer is zero.
before the PCnet-ISA+
controller obtained the
next STATUS byte
(TMD1[15:8]).
Description
Description
+
+
+
controller.
controller does not
controller
ERROR
when
AMD
during
1-573
indi-
the
+
+

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