s71gl128nb0 Meet Spansion Inc., s71gl128nb0 Datasheet - Page 116

• Manufacturer Part Number: s71gl128nb0
• Description: Stacked Multi-chip Product Mcp 512/256/128 Megabit 32/16/8 M X 16-bit Cmos 3.0 Volt-only Mirrorbittm Page-mode Flash Memory With 32 Megabit 2m X 16-bit Psram
• Manufacturer: Meet Spansion Inc.

Timing Diagrams
116
Read Cycle
Address
Data Out
Figure 22. Timing of Read Cycle (CE# = OE# = V
Previous Data Valid
3 Volt
Symbol
twhz
twpc
taw
tbw
twp
tdw
tow
tow
twc
tcw
twr
tdh
tas
tpc
tpa
tcp
Performance Grade
A d v a n c e
t
OH
Write cycle time
Chipselect to end
of write
Address set up
Time
Address valid to
end of write
UB#, LB# valid
to end of write
Write pulse width
Write recovery
time
Write to output
High-Z
Data to write
time overlap
Data hold from
write time
End write to
output Low-Z
Write high pulse
width
Page read cycle
Page address
access time
Page write cycle
Chip select high
pulse width
Parameter
pSRAM Type 1
Density
t
AA
I n f o r m a t i o n
t
RC
Min
7.5
70
60
60
60
50
20
20
20
10
0
0
0
5
64Mb pSRAM
Page Mode
-70
Max
IL
20k
20k
20k
20k
20
5
, WE# = ZZ# = V
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Data Valid
pSRAM_Type01_12_A1 August 30, 2004
IH
)