s71gl128nb0 Meet Spansion Inc., s71gl128nb0 Datasheet - Page 20

• Manufacturer Part Number: s71gl128nb0
• Description: Stacked Multi-chip Product Mcp 512/256/128 Megabit 32/16/8 M X 16-bit Cmos 3.0 Volt-only Mirrorbittm Page-mode Flash Memory With 32 Megabit 2m X 16-bit Psram
• Manufacturer: Meet Spansion Inc.

General Description
20
The GL512/256/128N family of devices are 3.0V single power flash memory man-
ufactured using 110 nm MirrorBit technology. The GL512N is a 512 Mbit,
organized as 33,554,432 words or 67,108,864 bytes. The GL256N is a 256 Mbit,
organized as 16,777,216 words or 33,554,432 bytes. The GL128N is a 128 Mbit,
organized as 8,388,608 words or 16,777,216 bytes. The devices have a 16-bit
wide data bus that can also function as an 8-bit wide data bus by using the BYTE#
input. The device can be programmed either in the host system or in standard
EPROM programmers.
Access times as fast as 90 ns (GL128N, GL256N) or 100 ns (GL512N) are
available.
Each device requires only a single 3.0 volt power supply for both read and
write functions. In addition to a V
(WP#/ACC) input provides shorter programming times through increased cur-
rent. This feature is intended to facilitate factory throughput during system
production, but may also be used in the field if desired.
The devices are entirely command set compatible with the JEDEC single-
power-supply Flash standard. Commands are written to the device using
standard microprocessor write timing. Write cycles also internally latch addresses
and data needed for the programming and erase operations.
The sector erase architecture allows memory sectors to be erased and repro-
grammed without affecting the data contents of other sectors. The device is fully
erased when shipped from the factory.
Device programming and erasure are initiated through command sequences.
Once a program or erase operation has begun, the host system need only poll the
DQ7 (Data# Polling) or DQ6 (toggle) status bits or monitor the Ready/Busy#
(RY/BY#) output to determine whether the operation is complete. To facilitate
programming, an Unlock Bypass mode reduces command sequence overhead
by requiring only two write cycles to program data instead of four.
Hardware data protection measures include a low V
ically inhibits write operations during power transitions. Persistent Sector
Protection provides in-system, command-enabled protection of any combina-
tion of sectors using a single power supply at V
prevents unauthorized write and erase operations in any combination of sectors
through a user-defined 64-bit password.
The Erase Suspend/Erase Resume feature allows the host system to pause an
erase operation in a given sector to read or program any other sector and then
complete the erase operation. The Program Suspend/Program Resume fea-
ture enables the host system to pause a program operation in a given sector to
read any other sector and then complete the program operation.
The hardware RESET# pin terminates any operation in progress and resets the
device, after which it is then ready for a new operation. The RESET# pin may be
tied to the system reset circuitry. A system reset would thus also reset the device,
enabling the host system to read boot-up firmware from the Flash memory
device.
The device reduces power consumption in the standby mode when it detects
specific voltage levels on CE# and RESET#, or when addresses have been stable
for a specified period of time.
S29GLxxxN MirrorBit
A d v a n c e
CC
input, a high-voltage accelerated program
TM
Flash Family
I n f o r m a t i o n
CC
. Password Sector Protection
CC
detector that automat-
S29GLxxxN_00_A4 June 14, 2004