s71gl128nb0 Meet Spansion Inc., s71gl128nb0 Datasheet - Page 71

• Manufacturer Part Number: s71gl128nb0
• Description: Stacked Multi-chip Product Mcp 512/256/128 Megabit 32/16/8 M X 16-bit Cmos 3.0 Volt-only Mirrorbittm Page-mode Flash Memory With 32 Megabit 2m X 16-bit Psram
• Manufacturer: Meet Spansion Inc.

June 14, 2004 S29GLxxxN_00_A4
RY/BY#: Ready/Busy#
The RY/BY# is a dedicated, open-drain output pin which indicates whether an
Embedded Algorithm is in progress or complete. The RY/BY# status is valid after
the rising edge of the final WE# pulse in the command sequence. Since RY/BY#
is an open-drain output, several RY/BY# pins can be tied together in parallel with
a pull-up resistor to V
If the output is low (Busy), the device is actively erasing or programming. (This
includes programming in the Erase Suspend mode.) If the output is high (Ready),
the device is in the read mode, the standby mode, or in the erase-suspend-read
mode. Table
A d v a n c e
12
Notes:
1. VA = Valid address for programming. During a sector
2. DQ7 should be rechecked even if DQ5 = “1” because
shows the outputs for RY/BY#.
erase operation, a valid address is any sector address
within the sector being erased. During chip erase, a
valid address is any non-protected sector address.
DQ7 may change simultaneously with DQ5.
No
Figure 5. Data# Polling Algorithm
CC
S29GLxxxN MirrorBit
.
Read DQ7–DQ0
Read DQ7–DQ0
DQ7 = Data?
DQ7 = Data?
I n f o r m a t i o n
Addr = VA
Addr = VA
DQ5 = 1?
START
FAIL
No
Yes
No
TM
Yes
Yes
Flash Family
PASS
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