txc-03456 TranSwitch Corporation, txc-03456 Datasheet - Page 26

• Manufacturer Part Number: txc-03456
• Description: Device Level Mapper
• Manufacturer: TranSwitch Corporation

Drop clock period
Duty cycle, t
Set-up time for DC1J1 to DCLK
Hold time for DC1J1 after DCLK
Delay ACLK from DCLK
Delay ASPE from ACLK
Delay AC1J1 from ACLK
Delay, data from ACLK
Delay, ADD from ACLK
Delay, APAR from ACLK
(OUTPUT)
(OUTPUT)
(OUTPUT)
(OUTPUT)
(OUTPUT)
AD7-AD0
(INPUT)
(INPUT)
DC1J1
AC1J1
DCLK
ACLK
ASPE
ADD
Note: The C1 and J1 pulses must be present in the DC1J1 signal if the pointer tracking state machine is
PWH
turned off. The add bus J1 pulse is shown for the SVC4H control bit set to 0. The APAR signal is not
shown.
Parameter
/t
CYC
Figure 7. Add Bus Interface Timing (Drop Bus Clock and C1)
t
SU
C1
C1
(not shown)
t
H
Symbol
t
t
t
t
t
t
t
CYC
t
D(1)
D(2)
D(3)
D(4)
D(5)
D(6)
SU
t
H
DATA SHEET
- 26 -
t
PWH
t
CYC
12.0
Min
-6.0
-6.0
-6.0
-6.0
-6.0
3.0
7.0
40
J1
J1
t
D(1)
t
t
t
t
D(3)
D(4)
t
D(2)
D(5)
PWL
DATA
51.44
Typ
50
DATA
DATA
J1
Max
28.0
6.0
6.0
6.0
6.0
60
11
DATA
Ed. 1A, January 2000
TXC-03456
TXC-03456-MB
DATA
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
%
L4M