txc-03456 TranSwitch Corporation, txc-03456 Datasheet - Page 86

• Manufacturer Part Number: txc-03456
• Description: Device Level Mapper
• Manufacturer: TranSwitch Corporation

RECEIVE POH REGISTER DESCRIPTIONS
The transmission of the POH byte in the add direction, and the processing of the POH bytes in the drop direc-
tion is enabled when a high is placed on the POHDIS lead.
Address
C0 to FF
7C
7D
7A
7B
7E
7F
75
78
79
7-0
7-0
7-0
7-0
7-0
7-0
7-0
7-0
7-0
7-0
Bit
Compare
Received
Received
Received
Message
Symbol
B3 Byte
Signal
Label
Byte
Byte
G1
C2
C2
H4
F2
Z3
Z4
Z5
J1
C2 Path Signal Label Compare Byte: The bits in this location are written by
the microprocessor and are compared against the received C2 value for path
signal label mismatch detection. Bit 7 in this location corresponds to bit 1 in
the C2 byte.
B3 Received Byte: This location contains the received B3 parity byte value
received each frame. Bit errors are counted in a 16-bit counter located at
40H (low order byte) and 41H (high order byte). Block errors (one or more
parity errors) are counted in an 8-bit counter located at 4AH. Bit 7 in this
location corresponds to bit 1 in the B3 byte.
C2 Received Signal Label Byte: This location is the received C2 byte value
received each frame. The received C2 byte is compared against the micro-
processor-written value in location 75H. Bit 7 in this location corresponds to
bit 1 in the C2 byte.
Received G1 Byte: This location is the received G1 byte value received
each frame. The bit relationship is the following.
1
7
F2 Received Byte: This location is the received F2 byte value received each
frame. Bit 7 in this location corresponds to bit 1 in the F2 byte.
H4 Received Byte: This location is the received H4 byte value received
each frame. Bit 7 in this location corresponds to bit 1 in the H4 byte.
Z3 Received Byte: This location is the received Z3 byte value received each
frame. Bit 7 in this location corresponds to bit 1 in the Z3 byte.
Z4 Received Byte: This location is the received Z4 byte value received each
frame. Bit 7 in this location corresponds to bit 1 in the Z4 byte.
Z5 Received Byte: This location is the received Z5 byte value received each
frame. Bit 7 in this location corresponds to bit 1 in the Z5 byte.
Path Trace Message Microprocessor Read feature: The received J1 mes-
sage bytes are stored into this memory segment. The 16-byte message is
allocated to the C0H to CFH memory segment, when control bit CCITT is a
1. When CCITT is 0, the memory segment is configured for 64 bytes. The
incoming message is written in with no specific starting address, and in a
rotating fashion, and any incoming J1 byte is written into the next sequential
RAM location. However, when CCITT and J1COM are both set to 1 and the
received 16-byte J1 message has a valid multiframe alignment pattern and is
stable (J1LOL=0), the bits written into C0H-CFH will be aligned such that the
J1 Byte with the start of multiframe indication will be in location C0H. The
values in C0H to CFH will be the “debounced” stable message.
FEBE
2
6
3
5
4
4
RDI Unassigned
5
3
DATA SHEET
- 86 -
6
2
7
1
8 G1 Byte
0 This location
Description
Ed. 1A, January 2000
TXC-03456
TXC-03456-MB
L4M