at52sc1283j ATMEL Corporation, at52sc1283j Datasheet - Page 37
at52sc1283j
Manufacturer Part Number
at52sc1283j
Description
128-mbit Flash + 32-mbit/64-mbit Psram Stack Memory
Manufacturer
ATMEL Corporation
Datasheet
1.AT52SC1283J.pdf
(52 pages)
- Current page: 37 of 52
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34. Program Cycle Characteristics
35. Program Cycle Waveforms
36. Sector, Plane or Chip Erase Cycle Waveforms
Notes:
3530B–STKD–2/4/05
Symbol
t
t
t
t
t
t
BP
SEC1
SEC2
ES
PS
ERES
1. Any address can be used to load data.
2. OE must be high only when WE and CE are both low.
3. The data can be 40H or 10H.
4. For chip erase, any address can be used. For plane erase or sector erase, the address depends on what plane or sector is
5. For chip erase, the data should be 21H, for plane erase, the data should be 22H, and for sector erase, the data should
to be erased.
be 20H.
Parameter
Word Programming Time
Sector Erase Cycle Time (4K word sectors)
Sector Erase Cycle Time (32K word sectors)
Erase Suspend Time
Program Suspend Time
Delay between Erase Resume and Erase Suspend
I/O0 - I/O15
I/O0 - I/O15
A0 - A22
A0 - A22
AVD
WE
OE
CE
AVD
WE
OE
CE
(2)
t
AS
XX
t
WC
(1)
WORD 0
t
XX
Note 5
AS
t
WC
t
(1)
AH
Note 3
t
WPH
t
AH
t
WPH
Note 4
t
t
WORD 1
WP
DS
ADDRESS
INPUT DATA
D0
t
t
WP
DS
PROGRAM CYCLE
t
DH
t
DH
AT52SC1283J/1284J [Preliminary]
t
BP
t
SEC1/2
Min
500
Typ
200
800
22
V
IL
V
IL
Max
15
10
Units
ms
ms
µs
µs
µs
µs
37
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