at52sc1283j ATMEL Corporation, at52sc1283j Datasheet - Page 45

• Manufacturer Part Number: at52sc1283j
• Description: 128-mbit Flash + 32-mbit/64-mbit Psram Stack Memory
• Manufacturer: ATMEL Corporation

49. Read Cycle Waveforms
49.1
(Address Controlled, PCS1 = POE = V
49.2
(ZZ = PWE = V
Notes:
49.3
(ZZ = PWE = V
Notes:
3530B–STKD–2/4/05
Read Cycle (1)
Read Cycle (2)
1. t
2. At any given temperature and voltage condition, t
3. Do not access device with cycle timing shorter than t
Page Read Cycle
1. t
2. At any given temperature and voltage condition, t
3. Do not access device with cycle timing shorter than t
voltage levels.
device interconnection.
voltage levels.
device interconnection.
HZ
HZ
and t
and t
Address
Data Out
IH
IH
PUB, PLB
Address
Data Out
)
, 16 Words Access)
OHZ
OHZ
PCS1
POE
are defined as the time at which the outputs achieve the open circuit conditions and are not referenced to output
are defined as the time at which the outputs achieve the open circuit conditions and are not referenced to output
PUB, PLB
Data Out
A4~ A20
A0~ A3
PCS1
OE
Previous Data Valid
High-Z
High-Z
IL
, ZZ = PWE = V
t
t
LZ
BLZ
t
AA
t
t
CO
RC
t
BA
t
OE
t
OLZ
Data Valid
t
PAA
t
PC
Z
Data Valid
H
HZ
HZ
IH
t
A
AT52SC1283J/1284J [Preliminary]
PAA
, PUB or/and PLB = V
(max) is less than t
(max) is less than t
t
RC
PC
RC
LZ
A
A
Data Valid
E
(t
(t
t
WC
WC
PAA
t
t
MRC
PC
) for continuous periods > 10 µs.
) for continuous periods > 10 µs.
Data Valid
t
PAA
t
PC
Data Valid
t
PAA
t
LZ
PC
LZ
Data Valid
Data Valid
(min) both for a given device and from device to
(min) both for a given device and from device to
t
PAA
IL
t
PC
)
Data Valid
t
PAA
t
Data Valid
PC
Data Valid
t
OH
H
t
t
t
HZ
OHZ
BHZ
HZ
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