k4s643232c Samsung Semiconductor, Inc., k4s643232c Datasheet - Page 34

• Manufacturer Part Number: k4s643232c
• Description: 2m X 32 Sdram 512k X 32bit X 4 Banks Synchronous Dram Lvttl
• Manufacturer: Samsung Semiconductor, Inc.

DQ
CLOCK
K4S643232C
Read & Write Cycle with Auto Precharge II @Burst Length=4
A
ADDR
DQM
10
CKE
RAS
CAS
BA
BA
/AP
WE
CS
CL=2
CL=3
0
1
*Note:
0
Row Active
(A-Bank)
Ra
Ra
1
* When Read(Write) command with auto precharge is issued at A-Bank after A and B Bank activation.
- if Read(Write) command without auto precharge is issued at B-Bank before A Bank auto precharge starts, A Bank
- any command can not be issued at A Bank during tRP after A Bank auto precharge starts.
auto precharge will start at B Bank read command input point .
2
3
Row Active
(B-Bank)
Rb
Rb
4
Read with
Auto Pre
(A-Bank)
charge
Ca
5
6
precharge(B-Bank)
Read without Auto
Auto Precharge
Qa0
Cb
Start Point
(A-Bank)*
7
Qa1
Qa0
8
Qb0
Qa1
9
- 34
HIGH
Qb1
Qb0
10
Qb2
Qb1
11
Precharge
(B-Bank)
Qb3
Qb2
12
Qb3
13
14
Row Active
(A-Bank)
Ra
Ra
15
REV. 1.1 Nov. '99
CMOS SDRAM
16
17
Auto Precharge
18
Write with
(A-Bank)
: Don't care
Da0
Ca
Da0
19
Da1
Da1