k4s643232c Samsung Semiconductor, Inc., k4s643232c Datasheet - Page 8

• Manufacturer Part Number: k4s643232c
• Description: 2m X 32 Sdram 512k X 32bit X 4 Banks Synchronous Dram Lvttl
• Manufacturer: Samsung Semiconductor, Inc.

Note :
K4S643232C
AC CHARACTERISTICS
CLK cycle time
CLK to valid
output delay
Output data
CLK high pulse width
CLK low pulse width
Input setup time
Input hold time
CLK to output in Low-Z
CLK to output
in Hi-Z
1. Parameters depend on programmed CAS latency.
2. If clock rising time is longer than 1ns, (tr/2-0.5)ns should be added to the parameter.
3. Assumed input rise and fall time (tr & tf)=1ns.
2. Minimum delay is required to complete write.
3. All parts allow every cycle column address change.
4. In case of row precharge interrupt, auto precharge and read burst stop.
5. For -55/60/70/80/10, tRDL=1CLK product can be supported within restricted amounts and it will be distinguished by bucket
6. A new command should be issued after self refersh exit followed by tRFC.
If tr & tf is longer than 1ns, transient time compensation should be considered,
i.e., [(tr + tf)/2-1]ns should be added to the parameter.
CLK cycle time
Row active to row active delay
RAS to CAS delay
Row precharge time
Row active time
Row cycle time
Row cycle time in Auto refresh
code "NV". From the next generation, tRDL will be only 2CLK for every clock frequency.
Parameter
Parameter
CAS Latency=3
CAS Latency=2
CAS Latency=3
CAS Latency=2
CAS Latency=3
CAS Latency=2
CAS Latency=3
CAS Latency=2
CAS Latency=3
CAS Latency=2
CAS Latency=3
CAS Latency=2
(AC operating conditions unless otherwise noted)
Symbol
t
t
t
t
t
t
t
t
t
t
t
CC(min)
RRD(min)
RCD(min)
RP(min)
RAS(min)
RAS(max)
RC
RFC
Symbol
t
SAC
t
t
t
t
t
SHZ
SLZ
CC
OH
CH
SS
SH
CL
(
min
(
min
)
)
Min
5.5
1.5
2
2
2
1
1
-
-
-
-
-
-
-
-
-55
16.5
16.5
38.5
-55
5.5
11
55
66
1000
Max
5
5
-
-
-
-
-
-
-
-
-
-
-
- 8 -
Min
2.5
2.5
2.5
1.5
6
1
1
-
-
-
-
-
-
-
-
-60
-60
12
18
18
42
60
72
6
1000
Max
5.5
5.5
-
-
-
-
-
-
-
-
Version
1.75
Min
2.5
100
7
3
3
1
1
-70
-
-
-
-
-
-
14
21
21
49
70
70
7
-70
1000
Max
5.5
5.5
-
-
-
-
-
-
-
-
-80
16
20
20
48
70
70
8
Min
2.5
10
8
3
3
2
1
1
-
-
-
-
-80
1000
Max
6
6
6
6
-
-
-
-
-
-
-10
10
20
20
20
48
70
70
REV. 1.1 Nov. '99
CMOS SDRAM
Min
2.5
3.5
3.5
2.5
10
12
1
1
-
-
-
-
-10
1000
Max
Unit
ns
ns
ns
ns
ns
us
ns
ns
6
8
6
8
-
-
-
-
-
-
Unit Note
ns
ns
ns
ns
ns
ns
ns
ns
ns
1, 2
1
2
3
3
3
3
2