k9f1208u0a-y Samsung Semiconductor, Inc., k9f1208u0a-y Datasheet - Page 37

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k9f1208u0a-y

Manufacturer Part Number
k9f1208u0a-y
Description
64m X 8 Bit , 32m X 16 Bit Nand Flash Memory
Manufacturer
Samsung Semiconductor, Inc.
Datasheet

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R/B
I/O
K9F1208D0A
K9F1208U0A
Restriction in addressing with Multi Plane Page Program
Figure 14. Multi-Plane Program & Read Status Operation
Figure 15. Addressing Multiple Planes
Figure 16. Multi-Plane Page Program & Read Status Operation
While any block in each plane may be addressable for Multi-Plane Page Program, the five least significant addresses(A9-A13) for the
selected pages at one operation must be the same. Figure 14 shows an example where 2nd page of each addressed block is
selected for four planes. However, any arbitrary sequence is allowed in addressing multiple planes as shown in Figure15.
Multi-Plane Block Erase
Basic concept of Multi-Plane Block Erase operation is identical to that of Multi-Plane Page Program. Up to four blocks, one from each
plane can be simultaneously erased. Standard Block Erase command sequences (Block Erase Setup command followed by three
address cycles) may be repeated up to four times for erasing up to four blocks. Only one block should be selected from each plane.
The Erase Confirm command initiates the actual erasing process. The completion is detected by analyzing R/B pin or Ready/Busy
status (I/O 6). Upon the erase completion, pass/fail status of each block is examined by reading extended pass/fail status(I/O 1
through I/O 4).
Figure 17. Four Block Erase Operation
R/B
I/O
X
0
~
7
60h
Block 0
80h
A
Plane 0
(1024 Block)
Page 30
Page 31
0
Page 0
Page 1
~ A
(3 Cycle)
Address
7
& A
80h
Plane 2
9
~ A
K9F1216D0A
K9F1216U0A
Last Plane input
25
60h
A
528 bytes(x8 device)
or 264words(x16 device)
Address & Data Input
0
~ A
11h
(3 Cycle)
Address
7
& A
9
80h
~ A
Block 1
25
Plane 1
(1024 Block)
60h
Page 30
Page 31
Page 0
Page 1
Plane 0
(3 Cycle)
Address
10h
11h
60h
37
80h
(3 Cycle)
Address
t
PROG
Plane 2
(1024 Block)
Block 2
Plane3
Page 30
Page 31
Page 0
Page 1
D0h
11h
71h
t
BERS
80h
FLASH MEMORY
71h
Plane 1
Plane 3
(1024 Block)
Block 3
Page 30
Page 31
Fail
I/O
Page 0
Page 1
Fail
I/O
10h
Pass
Pass

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