m393b1k70bh1 Samsung Semiconductor, Inc., m393b1k70bh1 Datasheet - Page 36

• Manufacturer Part Number: m393b1k70bh1
• Description: Ddr3 Sdram
• Manufacturer: Samsung Semiconductor, Inc.

17.3 Speed Bins and CL, tRCD, tRP, tRC and tRAS for corresponding Bin
DDR3-800 Speed Bins
DDR3-1066 Speed Bins
Registered DIMM
Intermal read command to first data
ACT to internal read or write delay time
PRE command period
ACT to ACT or REF command period
ACT to PRE command period
CL = 6 / CWL = 5
Supported CL Settings
Supported CWL Settings
Intermal read command to first data
ACT to internal read or write delay time
PRE command period
ACT to ACT or REF command period
ACT to PRE command period
CL = 6
CL = 7
CL = 8
Supported CL Settings
Supported CWL Settings
DDR3 SDRAM Speed Bins include tCK, tRCD, tRP, tRAS and tRC for each corresponding bin.
Parameter
Parameter
CL-nRCD-nRP
CL-nRCD-nRP
Speed
Speed
CWL = 5
CWL = 6
CWL = 5
CWL = 6
CWL = 5
CWL = 6
tCK(AVG)
tCK(AVG)
tCK(AVG)
tCK(AVG)
tCK(AVG)
tCK(AVG)
tCK(AVG)
Symbol
Symbol
tRCD
tRAS
tRCD
tRAS
tRP
tRC
tRC
tAA
tAA
tRP
36 of 51
13.125
13.125
13.125
50.625
1.875
1.875
37.5
52.5
37.5
min
min
2.5
2.5
15
15
15
DDR3-1066
DDR3-800
Reserved
Reserved
Reserved
7 - 7 - 7
6 - 6 - 6
6,7,8
5,6
6
5
9*tREFI
9*tREFI
max
<2.5
<2.5
max
3.3
3.3
20
20
-
-
-
-
-
-
Rev. 1.0 December 2008
DDR3 SDRAM
Units
Units
nCK
nCK
nCK
nCK
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
1,2,3,6
1,2,3,4
1,2,3,4
Note
1,2,3
Note
1,2,3
8
4
4
8