m28529-12 Mindspeed Technologies, m28529-12 Datasheet - Page 270

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m28529-12

Manufacturer Part Number
m28529-12
Description
Inverse Multiplexing For Atm Ima Family
Manufacturer
Mindspeed Technologies
Datasheet

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Part Number:
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Figure 3-10. PHY-Side Serial T1/E1/DSL Mode Transmit Timing (TxClkPol = 0, TxDatShft = 1)
Figure 3-11. PHY-Side Serial T1/E1/DSL Mode Transmit Timing (TxClkPol = 1, TxDatShft = 1)
Table 3-11.
28529-DSH-001-K
Footnote:
(1) Timing synchronized to falling edge when TxClkPol = 1
General Note:
1. The TxClkPol (bit 3) in the IOMODE register determines whether timing is referenced to the positive or negative clock edge.
2. All outputs are assumed to have 20 pF loading.
S P T x S y n c
( O u t p u t )
S P T x S y n c
( O u t p u t )
S P T x D a t a
S P T x D a t a
S P T x C lk
S P T x S y n c
( I n p u t )
S P T x C lk
S P T x S y n c
( I n p u t )
Symbol
t
t
t
pwh
t
per
pwl
t
t
pd
s
h
PHY-side Serial T1/E1/DSL Mode Transmit Timing Parameters
Serial transmit clock period
Serial clock pulse width (high)
Serial clock pulse width (low)
Setup to sptxclk rise(fall)
Hold from sptxclk rise(fall)
Delay from sptxclk rise(fall)
Mindspeed Proprietary and Confidential
Mindspeed Technologies
Parameter
t
t
(1)
s
s
(1)
(1)
edge
edge
edge
t
t
p w h
p w h
t
t
h
h
t
t
p e r
p e r
t
t
t
t
p d
p d
p d
p d
t
t
p w l
p w l
®
t
t
Minimum
s
s
50
20
20
5
3
1
t
t
h
h
Typical
Product Specification
t
t
p d
p d
Maximum
20
Units
ns
ns
ns
ns
ns
ns
255

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