mfr4300 Freescale Semiconductor, Inc, mfr4300 Datasheet - Page 100

• Manufacturer Part Number: mfr4300
• Description: Flexray Communication Controllers
• Manufacturer: Freescale Semiconductor, Inc

FlexRay Module (FLEXRAYV2)
3.3.2.33
This register defines the Sync Frame Rejection Filter ID. The application must update this register outside
of the static segment. If the application updates this register in the static segment, it can appear that the
FlexRay module accepts the sync frame in the current cycle.
100
0x0046
Reset
SYNFRID
W
Field
R
SDVEN
9–0
SIDEN
Field
OPT
2
1
0
15
0
0
Sync Frame Rejection ID — This field defines the frame ID of a frame that must not be used for clock
synchronization. For details see
Sync Frame ID Rejection Filter Register (SFIDRFR)
14
0
0
One Pair Trigger — This trigger bit controls whether the FlexRay module writes continuously or only one pair
of Sync Frame Tables into the FRM.
If this trigger is set to ‘1’ while SDVEN or SIDEN is set to ‘1’, the FlexRay module writes only one pair of the
enabled Sync Frame Tables corresponding to the next even-odd-cycle pair into the FRM. In this case, the
FlexRay module clears the SDVEN or SIDEN bits immediately.
If this trigger is set to ‘0’ while SDVEN or SIDEN is set to ‘1’, the FlexRay module writes continuously the
enabled Sync Frame Tables into the FRM.
0 Write continuously pairs of enabled Sync Frame Tables into FRM.
1 Write only one pair of enabled Sync Frame Tables into FRM.
Sync Frame Deviation Table Enable — This bit controls the generation of the Sync Frame Deviation Tables.
The application must set this bit to request the FlexRay module to write the Sync Frame Deviation Tables into
the FRM.
0 Do not write Sync Frame Deviation Tables
1 Write Sync Frame Deviation Tables into FRM
Note: If the application sets SDVEN to ‘1’, then the application must set SIDEN to ‘1’ too.
Sync Frame ID Table Enable — This bit controls the generation of the Sync Frame ID Tables. The
application must set this bit to ‘1’ to request the FlexRay module to write the Sync Frame ID Tables into the
FRM.
0 Do not write Sync Frame ID Tables
1 Write Sync Frame ID Tables into FRM
13
0
0
Figure 3-32. Sync Frame ID Rejection Filter Register (SFIDRFR)
Table 3-38. SFTCCSR Field Descriptions (Sheet 2 of 2)
12
0
0
11
Table 3-39. SFIDRFR Field Descriptions
0
0
10
0
0
Section 3.4.15.2, “Sync Frame Rejection
MFR4300 Data Sheet, Rev. 3
16-bit write access required
0
9
0
8
Description
Description
0
7
6
0
SYNFRID
0
5
Filtering”.
0
4
0
3
Freescale Semiconductor
Write: Normal Mode
0
2
1
0
0
0