mfr4300 Freescale Semiconductor, Inc, mfr4300 Datasheet - Page 51

• Manufacturer Part Number: mfr4300
• Description: Flexray Communication Controllers
• Manufacturer: Freescale Semiconductor, Inc

2.7.1.3
2.7.1.4
See
Interface.
2.7.2
Chip selection for the HCS12 interface is generated internally using the following signals (see
Freescale Semiconductor
•
•
Section A.4, “Asynchronous Memory Interface
DSP56F83xx Family
The input values of the expanded address signals XADDR[14:19] are compared with logical 0’s
(the HCS12 External Bus Interface (EBI) is in the Paged or Unpaged mode).
The three most significant bits of the demultiplexed address bus, PA[5:7], are compared with the
pattern set up externally on the address chip select pins ACS[0:2]; PA5 is compared with ACS0,
PA6 with ACS1, PA7 with ACS2.
HCS12 Interface
Asynchronous Memory Interface with DSP 56F83 (Hawk) Family
Asynchronous Memory Interface Timing
The address decoding phase of a read/write operation is passed if all the
comparisons described above are passed.
IRQn#
Figure 2-7. AMI Interface with DSP 56F83 (Hawk) Family
CSn#
WR#
RD#
D15
A11
D0
A0
…
…
MFR4300 Data Sheet, Rev. 3
VDDXn
VSSXn
PL Interface
NOTE
Timing” for timing characteristics of the CC AMI
D15
…
D0
A12
…
A1
WE#
CE#
OE#
BSEL1#
BSEL0#
INT_CC#
TXD_BG2/IF_SEL0
TXD_BG1/IF_SEL1
MFR4300
Device Overview
Figure
2-8):
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